As Moore’s law reaches its end, traditional computing technology based on the Von Neumann architecture is facing fundamental limits. Among them is poor energy efficiency. This situation motivates the investigation of different processing information paradigms, such as the use of spiking neural networks, which also introduce cognitive characteristics. As applications at very high scale are addressed, the energy dissipation needs to be minimized. This effort starts from the neuron cell. In this context, this paper presents the design of an original artificial neuron, in standard 65nm CMOS technology with optimized energy efficiency. The neuron circuit response is designed as an approximation of the Morris-Lecar theoretical model. In order to implement the non-linear gating variables, which control the ionic channel currents, transistors operating in deep subthreshold are employed. Two different circuit variants describing the neuron model equations have been developed. The first one features spike characteristics, which correlate well with a biological neuron model. The second one is a simplification of the first, designed to exhibit higher spiking frequencies, targeting large scale bio-inspired information processing applications. The most important feature of the fabricated circuits is the energy efficiency of a few femtojoules per spike, which improves prior state-of-the-art by two to three orders of magnitude. This performance is achieved by minimizing two key parameters: the supply voltage and the related membrane capacitance. Meanwhile, the obtained standby power at a resting output does not exceed tens of picowatts. The two variants were sized to 200µm2 and 35µm2 with the latter reaching a spiking output frequency of 26kHz. This performance level could address various contexts, such as highly integrated neuro-processors for robotics, neuroscience or medical applications.

In the field of ad hoc networks, maintaining connectivity and performing efficient energy communication between several mobile stations (MS), involves the use of optimized geo localization based routing algorithms. With multipath contribution, indoor location based on a direct time difference of arrival (TDOA) measurement can dramatically increase its budget error and asks for innovative solutions allowing accurate time-of-flight measurement. A natural way of exploiting multiband ultrawide-band (UWB) technology, a simple input and multiple output (SIMO) approach can lead to the measurement of an enhanced TDOA (E-TDOA) measurement for accurate positioning.

The five(six)-port communication receiver uses one or two additional outputs in comparison with classical homodyne demodulators. This paper demonstrates for the first time the demodulation of RF signals and the regeneration of IQ-signals by means of a four-port receiver. This system comprises a four-port linear junction and two quadratic detectors with a square-law characteristic. A digital signal processing block completes the circuit to regenerate the IQ-signals without any constraint on the system or the signal. In comparison with the five(six)-port technique, the four-port reduces the circuit size, the cost and the power consumption.

The purpose of this letter is to demonstrate the high potentiality in terms of data rate and multiple access of a novel 60-GHz WLAN architecture for smart objects and indoor communication systems. This approach is based on the up-conversion of an ultrawide-bandwidth impulse radio signal (IR-UWB) in the 60-GHz frequency range to benefit of the natural advantages of the UWB technique while avoiding the baseband limitations. First results about the pulse generator and receiver architecture are discussed.