In this paper, a discussion is presented into how remote laboratories can be utilized in STEM (science, technology, engineering, and mathematics) education in order to provide and promote access to laboratory experiments via the Internet. This provision can be considered from a range of viewpoints in how to use Internet-based technologies to allow remote access to physical laboratory experiments whilst taking into account the needs and wishes of the individual. In recent years, countries around the world have placed an increased emphasis on promoting access to education for traditionally underrepresented groups and also to improve the quality of STEM education. Despite this, gaining access to laboratory facilities and experiments for many people can still be a problem. Remote laboratories can, however, be designed, developed, and deployed to support access to STEM education by providing remote access to facilities that would not otherwise be accessible to an individual. Recently, a range of solutions have been developed and successfully deployed which can be used to both provide access to and improve the quality of an educational offering. This paper will consider how the remote laboratory can be developed and used. It can also be considered as an assistive technology which could be used to provide access to individuals with specific needs, such as disability. The paper will consider what a remote laboratory is and how it can be developed with accessibility in mind.

Processing In Memory (PIM), also referred to as Processor in Memory, is the integration of a processor with RAM (Random Access Memory) on a single Integrated Circuit (IC). In this paper, the concept of PIM is developed to support memory read/write requirements for Mathematics of Arrays (MoA) operations that implement tensor inner and outer products. The concept for MoA in PIM supports the integration of the processing operations and data storage memory, allowing for increases in processing speed and memory data transfer rate, and can support decreases in memory access latency and power usage.

In today’s complex embedded systems targeting internet of things (IoT) applications, there is a greater need for embedded digital signal processing algorithms that can effectively and efficiently process complex data sets. A typical application considered is for use in supervised and unsupervised machine learning systems. With the move towards lower power, portable, and embedded hardware-software platforms that meet the current and future needs for such applications, there is a requirement on the design and development communities to consider different approaches to design realization and implementation. Typical approaches are based on software programmed processors that run the required algorithms on a software operating system. Whilst such approaches are well supported, they can lead to solutions that are not necessarily optimized for a particular problem. A consideration of different approaches to realize a working system is therefore required, and hardware based designs rather than software based designs can provide performance benefits in terms of power consumption and processing speed. In this paper, consideration is given to utilizing the field programmable gate array (FPGA) to implement a combined inner and outer product algorithm in hardware that utilizes the available hardware resources within the FPGA. These products form the basis of tensor analysis operations that underlie the data processing algorithms in many machine learning systems.

The environment consists of the interaction between the physical, biotic, and anthropic means. As this interaction is dynamic, environmental characteristics tend to change naturally over time, requiring continuous monitoring. In this scenario, the internet of things (IoT), together with traditional sensor networks, allows for the monitoring of various environmental aspects such as air, water, atmospheric, and soil conditions, and sending data to different users and remote applications. This paper proposes a Standard-based Internet of Things Platform and Data Flow Modeling for Smart Environmental Monitoring. The platform consists of an IoT network based on the IEEE 1451 standard which has the network capable application processor (NCAP) node (coordinator) and multiple wireless transducers interface module (WTIM) nodes. A WTIM node consists of one or more transducers, a data transfer interface and a processing unit. Thus, with the developed network, it is possible to collect environmental data at different points within a city landscape, to perform analysis of the communication distance between the WTIM nodes, and monitor the number of bytes transferred according to each network node. In addition, a dynamic model of data flow is proposed where the performance of the NCAP and WTIM nodes are described through state variables, relating directly to the information exchange dynamics between the communicating nodes in the mesh network. The modeling results showed stability in the network. Such stability means that the network has capacity of preserve its flow of information, for a long period of time, without loss frames or packets due to congestion.

In embedded electronic system applications being developed today, complex datasets are required to be obtained, processed, and communicated. These can be from various sources such as environmental sensors, still image cameras, and video cameras. Once obtained and stored in electronic memory, the data is accessed and processed using suitable mathematical algorithms. How the data are stored, accessed, processed, and communicated will impact on the cost to process the data. Such algorithms are traditionally implemented in software programs that run on a suitable processor. However, different approaches can be considered to create the digital system architecture that would consist of the memory, processing, and communications operations. When considering the mathematics at the centre of the design making processes, this leads to system architectures that can be optimized for the required algorithm or algorithms to realize. Mathematics of Arrays (MoA) is a class of operations that supports n-dimensional array computations using array shapes and indexing of values held within the array. In this article, the concept of MoA is considered for realization in software and hardware using Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) technologies. The realization of MoA algorithms will be developed along with the design choices that would be required to map a MoA algorithm to hardware, software or hardware-software co-designs.

This paper will consider the role of technology in the laboratory for a new course (module) in integrated circuit (IC) test development engineering for fifth year students in a higher education programme of study in electronic and computer engineering. Engineering laboratories form an essential part of the higher education learning experience for students in the engineering disciplines. They allow for theoretical aspects of a subject to be experimented with, and in many cases, ideas suitably visualized. This is particularly important to support student learning and understanding. In the electronic and computer engineering disciplines, laboratories can take several different forms from hands-on computer coding through to physical electronic circuit design, build and test exercises. This paper will discuss the development of module, and the creation of a laboratory arrangement using the field programmable gate array (FPGA) for a range of possible teaching and learning scenarios that will focus on required industrial IC test activities.