To enhance the computing efficiency in a neuromorphic architecture, it is important to develop suitable memory devices that can emulate the role of biological synapses. More specifically, not only are multiple conductance states needed to be achieved in the memory but each state is also analogously adjusted by consecutive identical pulses. Recently, electrochemical random-access memory (ECRAM) has been dedicatedly designed to realize the desired synaptic characteristics. Electric-field-driven ion motion through various electrolytes enables the conductance of the ECRAM to be analogously modulated, resulting in a linear and symmetric response. Therefore, the aim of this study is to review recent advances in ECRAM technology from the material and device engineering perspectives. Since controllable mobile ions play an important role in achieving synaptic behavior, the prospect and challenges of ECRAM devices classified according to mobile ion species are discussed.

Vertical three-terminal electrochemical random access memory (ECRAM) is developed to demonstrate the feasibility of high-density integration and mass production. Improved retention was obtained by investigation of role of the electrolyte layer.

A synaptic device with a multilayer structure is proposed to reduce the operating power of neuromorphic computing systems while maintaining a high-density integration. A simple metal–insulator–metal (MIM)-structured multilayer synaptic device is developed using an 8-inch wafer-based and complementary metal–oxide–semiconductor (CMOS) fabrication process. The three types of MIM-structured synaptic devices are compared to assess their effects on reducing the operating power. The obtained results exhibited low-power operation owing to the inserted layers acting as an internal resistor. The modulated operational conductance level and simple MIM structure demonstrate the feasibility of implementing both low-power operation and high-density integration in multilayer synaptic devices.

With the growing demand for efficient data analysis in the era of big data and artificial intelligence, the limitations of traditional von Neumann computing systems, especially in parallel processing, have become evident. Reservoir computing (RC), an energy‐efficient computing paradigm that leverages fixed weights and trains only the output layer, has emerged as a promising solution. Physical reservoir computing (PRC), which implements RC in hardware, enables real‐time and large‐scale data processing but faces challenges, such as process variability, material degradation, and limited complementary metal‐oxide‐semiconductor (CMOS) compatibility. This study introduces a novel PRC device based on an electrochemical field‐effect transistor (EcFET) with an indium gallium zinc oxide (IGZO) channel. The EcFET controls oxygen vacancies, which act as n‐type dopants, by injecting and extracting oxygen ions through electrochemical redox reactions in the channel. By applying an electric field to the gate electrode, the threshold voltage of the channel is controlled, enabling conductance modulation. With its low ion diffusivity, the IGZO channel provides short‐term memory characteristics and excellent performance. The proposed device exhibits a time constant of ≈300 ms, durability over ≈10 ⁴ cycles, cell variability below 10%, and test accuracy of 94.29%. These findings demonstrate the potential of IGZO‐based EcFETs for next‐generation energy‐efficient PRC.

A metal–insulator–metal-structured Ag-filament-based transparent threshold switch is developed as a selector device for a crossbar array, which can lead to high-density integration of advanced memory devices. Both threshold switching and rectifying behavior were achieved based on sensitive control of the filament size. Conduction mechanism analyses demonstrated that the rectifying behavior resulted from the Schottky barrier at the interface. From the threshold switching, including the rectifying behavior, the available crossbar array size is 10${}^5$-times larger.

While in-memory computing offers a promising approach to overcoming the limitations of the traditional von Neumann architecture, implementing an activation function, a critical component of neural networks, still requires substantial energy and area consumption when using conventional analog or digital circuitry. In this study, we introduce a two-terminal niobium-dioxide-based Peierls transition neuron (Peierls-neuron) that enables direct device-level implementation of the activation function. Through monolithic three-dimensional(3D) vertical integration of Peierls-neurons with synaptic devices, a highly compact neural network architecture is achieved featuring minimal interconnect overhead and maximum array density. A simple tuning method using a parallel resistor allows seamless compatibility with a broad range of synaptic conductance levels, thereby eliminating the need for additional peripheral circuits. Our integrated architecture achieves over 10⁴ times area reduction and up to 183.7 times energy savings compared with conventional activation function circuits. These results demonstrate a highly scalable and energy-efficient solution for the hardware implementation of neural network.