Magnetic skyrmions are localized and topologically protected spin configurations, which are of both fundamental and applied interests for future electronics. In this work, we propose a voltage-gated skyrmion transistor within the well-established framework of micromagnetics. Its operating conditions and processes have been theoretically investigated and demonstrated, in which the gate voltage can be used to switch on/off a circuit. Our results provide the first time guidelines for practical realization of hybrid skyrmionic-electronic devices.

Perpendicular magnetic tunnel junctions based on MgO/CoFeB structures are of particular interest for magnetic random-access memories because of their excellent thermal stability, scaling potential, and power dissipation. However, the major challenge of current-induced switching in the nanopillars with both a large tunnel magnetoresistance ratio and a low junction resistance is still to be met. Here, we report spin transfer torque switching in nano-scale perpendicular magnetic tunnel junctions with a magnetoresistance ratio up to 249% and a resistance area product as low as 7.0 Ω µm², which consists of atom-thick W layers and double MgO/CoFeB interfaces. The efficient resonant tunnelling transmission induced by the atom-thick W layers could contribute to the larger magnetoresistance ratio than conventional structures with Ta layers, in addition to the robustness of W layers against high-temperature diffusion during annealing. The critical switching current density could be lower than 3.0 MA cm⁻²for devices with a 45-nm radius.

From the discovery of giant magnetoresistance (GMR) to tunnel magnetoresistance (TMR), their subsequent application in large capacity hard disk drives (HDDs) greatly speeded up the information era over the past decades. However, the growing demand for big-data storage and processing is limited by the von-Neumann architecture due to the memory bottleneck and power dissipation. Taking advantage of nonvolatility, high speed, and low power, magnetic random access memory (MRAM) becomes a promising candidate to overcome this limitation through processing-in-memory (PIM) architectures. In this article, we provide an overview of existing technology and give a roadmap of spintronic devices for future energy-efficient computing and its relevant integration architectures. We begin with the fundamentals of Toggle-MRAM and spin-transfer torque (STT)-MRAM, which already have commercial applications. We then introduce spin-orbit torque (SOT), a critical mechanism to realize low-power data manipulation in the next generation of MRAM and summarize the recent experimental breakthroughs of field-free SOT switching schemes. Finally, we present MRAM-based PIM architectures and novel spintronic devices, provide an application outlook, and deliver the future development potential of energy-efficient computing systems.