Rogelio Garcia Retegui

Prof. Rogelio Garcia Retegui


Research Focus & Metrics

Academic Career Length

20Years (2007-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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27 August 2007 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
SGSergio Alejandro González
Sergio Alejandro González
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
MBMario Benedetti
Mario Benedetti
The design and implementation of a novel method for reference generation that is applied to active power Alters (APFs) is introduced in this paper. The proposed reference generation performs harmonic detection based on the Goertzel algorithm. The method computes both the module I1 and the phase phi of the signal, with minimum computation overhead. This makes the method suitable for APFs or other applications that require harmonic detection. A comparison analysis between the discrete Fourier transform and the proposed method is carried out. The proposed reference generator is implemented using a digital signal processor and tested with waveforms from typical load currents. Experimental results are obtained under both stationary and transient states.

5 July 2018 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
NWNicolas Wassinger
Nicolas Wassinger
EPEmiliano Penovi
Emiliano Penovi
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
SMSebastian Maestri
Sebastian Maestri
Fault-tolerance capability is a critical matter in power conversion systems that require continuous operation. Multiphase converters provide an inherent redundancy that gives them fault-tolerant capability. In addition, the interleaved operation of these converters provides them with some advantages regarding total current ripple, which otherwise would be lost under a fault condition. This issue can be solved by means of an identification and reconfiguration system. This paper proposes a method for open-circuit fault identification, based on the time domain comparison of the residual of a state-space observer with signatures per phase. Signature on-line generation, together with a proper normalization and thresholding strategy, provides immunity with respect to the operation point. The use of the phase information associated to the interleaved operation allows to reduce the number of sensed variables, making it possible to identify the faulty leg by only sensing input and output signals, which are conventionally used for control purposes. Hence, the measurement of signals within every leg is avoided. Experimental results on a 4-phase interleaved buck converter validate the method capacity to identify faults in two switching periods. Robustness regarding abrupt changes in the operational conditions was tested.

1 February 2012 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
MBMario Benedetti
Mario Benedetti
MFMarcos Funes
Marcos Funes
PAPablo Antoszczuk
Pablo Antoszczuk
DCDaniel Carrica
Daniel Carrica
When it comes to high-power current sources, multiphase buck converters become an attractive alternative to deliver high currents. However, large variations in current reference or load voltage lead to disturbances that require high dynamics in the transitory response of current control. This letter presents a current control for high-dynamic, high-power multiphase buck converters. The control proposed is based on the synchronization of zero-crossing current ripples with a time reference pattern. This control forces a correct interleaving and is capable of responding, with a reduced transitory time, to major changes in current reference and load voltage. Experimental results validate the proposal.

1 April 2014 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
PAPablo D. Antoszczuk
Pablo D. Antoszczuk
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
NWNicolas Wassinger
Nicolas Wassinger
SMSebastian Maestri
Sebastian Maestri
MFMarcos Funes
Marcos Funes
MBMario Benedetti
Mario Benedetti
Interleaved power converters are used in high-current applications due to their inherent reduction of semiconductors stress and total ripple. Ripple reduction is accomplished by a correct phase shifting, and the filtering improvement explained by the increase in the ripple frequency. However, these benefits are wasted, among other reasons, by the mismatch of the phase inductor value. As a consequence, differences in the ripple amplitude among phases are produced, leading to a total current ripple significantly greater than the ideal case, the loss of the cancellation points and the generation of the switching frequency component and its harmonics. The works dealing with this subject matter have focused on particular cases, such as a given number of phases, a specific converter topology, or a particular case of inductance mismatch, disregarding a general analytical approach. This paper proposes an analytical method to characterize the total ripple in steady state as a function of the duty cycle and the number of phases under any condition on inductance mismatch. Experimental results validate the proposed method.

18 December 2014 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
EPEmiliano Penovi
Emiliano Penovi
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
SMSebastian Maestri
Sebastian Maestri
GUGustavo Uicich
Gustavo Uicich
MBMario Benedetti
Mario Benedetti
This study presents a novel multistructure power converter capable of generating high current pulses with short rise and fall times, and high precision in the flat-top. The proposed topology is based on the use of three conversion structures operated with current, voltage and switching frequency ratings in line with the different requirements of each pulse stage. In order to achieve the required precision, a switched-mode compensation structure in series with the load is used. Though this structure must handle a high load current, it is designed to deviate most of the load current to an auxiliary inductor; thus reducing the semiconductor devices requirements. Moreover, the use of this compensation strategy results in a first-order model of the circuit, which leads to an oscillation-free response during structures interconnection. This feature minimizes the required flat-top time, which in turn decreases the power losses on the load. Experimental results based on a scaled-down laboratory prototype validate the capability of the proposed topology to produce current pulses according to the specifications of high-precision applications.

9 August 2010 in IEEE Transactions on Power Electronics
Verified
Journal Article
Closed access
NWNicolás Wassinger
Nicolás Wassinger
SMSebastián Maestri
Sebastián Maestri
RRRogelio Garcia Retegui
Rogelio Garcia Retegui
JCJean Marc Cravero
Jean Marc Cravero
MBMario Benedetti
Mario Benedetti
DCDaniel Carrica
Daniel Carrica
A new high-current, low-rise-time, and high-precision pulse generator is presented. The topology is based on the use of different stages, each one specific for a particular operation range in terms of power and switching frequency. This approach allows to accomplish current, voltage, and precision requirements with standard semiconductors. Moreover, the proposed topology provides an independent and flexible adjustment of the pulse parameters (rise and fall times, flat-top duration, pulse amplitude, etc.). Experimental results are provided to validate the control of the proposed topology.