Single-photon detectors have gained significant attention recently, driven by advancements in quantum information technology. Applications such as quantum key distribution, quantum cryptography, and quantum computation demand the ability to detect individual quanta of light and distinguish between single-photon states and multi-photon states, particularly when operating within waveguide systems. Although single-photon detector fabrication has been established for some time, integrating detectors with waveguides using new materials with suitable structural and electronic properties, especially at telecommunication wavelengths, creates more compact source-line-detector systems. This review explores the state of the art of single-photon detector research and examines the potential breakthroughs offered by novel low-dimensional materials in this field.

Integrated photonics on Silicon-On-Insulator (SOI) substrates is a well developed research field that has already significantly impacted various fields, such as quantum computing, micro sensing devices, biosensing, and high-rate communications. Although quite complex circuits can be made with such technology, everything is based on a few ’building blocks’ which are then combined to form more complex circuits. This review article provides a detailed examination of the state of the art of integrated photonic building blocks focusing on passive elements, covering fundamental principles and design methodologies. Key components discussed include waveguides, fiber-to-chip couplers, edges and gratings, phase shifters, splitters and switches (including y-branch, MMI, and directional couplers), as well as subwavelength grating structures and ring resonators. Additionally, this review addresses challenges and future prospects in advancing integrated photonic circuits on SOI platforms, focusing on scalability, power efficiency, and fabrication issues. The objective of this review is to equip researchers and engineers in the field with a comprehensive understanding of the current landscape and future trajectories of integrated photonic components on SOI substrates with a 220 nm thick device layer of intrinsic silicon.