SCR-based Solid-state DC circuit breaker (SCR-DCCB) topologies have been widely studied for replacing traditional expensive IGBT-based DCCB. Yet, the existing SCR-DCCB cannot be actively turned-off since SCR is a half-controlled device. In this letter, an active Z-source DCCB (AZ-DCCB) is proposed by the combination of IGBT and SCR. The proposed AZ-DCCB has advantages of simple and compact topology, economical design, low conduction losses, active and bidirectional current breaking capacity. The operation process of the proposed AZ-DCCB is discussed in detail, and the designing principle of circuit parameters is also presented. Experimental results verified the effectiveness of the proposed AZ-DCCB.

Replacing expensive IGBT with thyristor to design dc circuit breaker (dcCB) is attracting attention recently due to its advantages in terms of low investment and low conduction loss. However, due to the half-controlled characteristic of thyristor, the existing thyristor-based dcCBs (T-CBs) cannot be actively turned off. As a result, the opening process is not fully controllable and reliable. In this letter, a simple active T-CB (AT-CB) topology is proposed. The proposed AT-CB can interrupt both fault current and operation current actively, and the current breaking process is fast, reliable, and fully controllable. Moreover, the proposed AT-CB can be improved to be bidirectional without increasing the conduction loss, and the topology remains simple. Parameters design principle and operation process of AT-CB are presented. Scaled-down experiment verified the effectiveness of the proposed solution.

A hybrid parallel-connected system with grid-following (GFL) and grid-forming (GFM) converters can be characterized as a high-order nonlinear dynamic system when performing transient synchronous stability analysis, which cannot be analyzed clearly by the existing method. The existing methods analyze the power angle for each converter individually, which fails to elucidate the transient coupling dynamic process of the power angles among different converters. To fill this gap, a 2-D phase portrait method is proposed by structure-preserving dimensionality reduction mapping, which can effectively reveal the interactive dynamics between GFM converter and GFL converter. The four types of factors, which impact the transient stabilization are elaborated by the proposed method. Furthermore, the influence of current limiting strategies on the transient stability is revealed by applying the 2-D phase portrait. Finally, experimental results are provided to verify the theoretical analysis.

The high-order harmonics caused by the modulation strategy can deteriorate power quality. The harmonic characteristics of carrier-based pulsewidth modulation are relatively fixed and difficult to optimize, while space vector pulsewidth modulation (SVPWM) has more flexibility. The unified SVPWM design method for single-phase three-level neutral-point clamped (NPC) converters is fully presented in this paper. Base on the proposed unified SVPWM method, two existing traditional vector sequences are designed first, and then several advanced multi-segment SVPWM algorithms are proposed. According to the particularity of the three-level NPC topology, two hybrid SVPWM algorithms are proposed to optimize harmonic performance. Moreover, the high-order harmonic characteristics and the number of switching actions are analyzed in detail for all SVPWM algorithm modes. In addition, these SVPWM algorithms are associated and unified by introducing weight coefficients of the redundant vectors. Simulation and experimental results verify the feasibility and effectiveness of the proposed SVPWM algorithms, which show that the proposed methods can optimize high-order harmonic distribution, and reduce the line current harmonics.

This paper proposes a multi-sampling method for single-phase grid-connected cascaded H-bridge (CHB) multilevel inverters with the phase-shifted carrier pulsewidth modulation (PSC-PWM) in order to reduce the time delay involved in the control loop and increase the control bandwidth. In this method, the controlled variables are sampled not only at the peak and the valley of all triangular carriers, but also at the intersection points of all phase-shifted carriers and inverted ones, which enables a minimum unity sampling interval without detecting the current ripple caused by the switching action and breaking the voltage-second balance in the modulation process. The bandwidth of the current control loop based on the proposed sampling method is illustrated and compared to other traditional sampling methods. The analysis shows that the system effectively reduces the time delay involved in the control loop and improves the bandwidth of the control loop. Finally, a downscale test platform of the single-phase grid-connected CHB multilevel inverter with an inductance (L)-filter is built to verify the effectiveness of the proposed method.

Power synchronization control (PSC) is an effective control method for a voltage-source converter (VSC) connected with a weak grid, where the short-circuit ratio is close to 1. The grid voltage sag will induce the synchronization instability of PSC-VSC and then trigger the catastrophic cascading failure in the power system. This letter presents the transient power angle nature of PSC under the grid disturbance by phase portrait, and the critical condition of transient synchronization instability for PSC is derived. The virtual orthogonal power (VOP) is elaborated and the power angle estimation method is presented by VOP. Then, a mode adaptive transient synchronization stability control scheme is proposed for the low-voltage ride through with the power angle estimation scheme. By using the proposed transient synchronization stability control scheme, the PSC-VSC can maintain synchronization with the grid during the fault of grid voltage sag. The control method theoretical analysis is verified by the experimental tests.