The manufacturing and characterization of nanographite films on substrates form the foundation for advances in materials science. Conductive graphite films are challenging products, as isolating graphite oxide is often necessary. In this study, nanographite suspensions containing non-oxidized graphite flakes were used to fabricate novel thin and ultrathin films via blade coating on industry-standard substrates. Films as thin as 346 nm were successfully fabricated. Moreover, it was possible to induce the orientation of the graphite nanoflakes via blade coating. This orientation led to electrical anisotropy; thus, the electrical behavior of the films in each orthogonal direction differed. After adjusting the coating parameters and the concentration of the nanographite flakes, the electrical conductivity ranged from 0.04 S/cm to 0.33 S/cm. In addition, with such adjustments, the transparency of the films in the visible range varied from 20% to 75%. By establishing a methodology for the tuning of both electrical and optical properties via adjustments in the nanographite suspension and coating parameters, we can fabricate resistant, conductive, and transparent films satisfying certain requirements. The results presented here can be extrapolated to enhance applications, especially for photonics and solar cells, in fields that require electrical conductive materials with high levels of transparency.

The demands for high resolution fabrication processes are ever-increasing, with new and optimized methodologies being highly relevant across several scientific fields. We systematically investigated thermal scanning probe lithography process and detailed how tuning temperature and probe contact time on the sample can optimize patterning and achieve 10 nm resolution. Additionally, we propose a novel fabrication methodology that integrates thermal scanning probe lithography and bilayer liftoff, achieving sub-20 nm resolution of the final metallized structures. Each step of the process, from sample preparation to the final liftoff, is described in detail. We also present a quantitative analysis comparing the accuracy of the lithography process to that of the bilayer liftoff. Finally, we show the feasibility of using thermal scanning probe lithography for the fabrication of photonic devices by validating our work with promising dipole geometries for this field.

Many fields in science and industry rely on the advances of nanofabrication processes. However, well-established techniques, such as electron beam lithography, might pose restrictions on dielectric materials due to surface charging effects. We propose using pulsed thermal scanning probe lithography to directly assemble high resolution patterns on insulating substrates. We applied this methodology to meet the requirements of fabricating all-dielectric metasurfaces. The pulsed thermal scanning probe lithography process, operating in standard room conditions, provided sub-10nm resolution for patterning on silica without the need of any additional conductive layers. Thus, the proposed technique improves material compatibility for nanofabrication and consequently enables the exploration of dielectric material properties across a wide range of devices.

This study develops a novel multi-step sputtering process to fabricate 150 nm thick $\text{TiO}_{2}$ films in the pure anatase phase, overcoming challenges related to uncontrolled phase transitions during prolonged plasma exposure. By introducing a three-stage deposition approach with intervals, we achieve consistent phase purity and reproducibility. Raman spectroscopy and optical ellipsometry confirm the effectiveness of this method. The multi-step sputtering process is applied to the fabrication of $\text{TiO}_{2}$ waveguides by thermal scanning probe lithography.

By exploiting alternative fabrication processes, electronic and photonic devices can be shrunken and their performance, enhanced. In this work, we study the fabrication of micro and nano structures through thermal scanning probe lithography. With no vacuum requirements, a structure with a minimum dimension of, approximately, 100nm was successfully built, in 17 minutes. Aiming at high performance electronic applications, the structure was coated with a 30nm gold film, and then electric characterized according to its foil resistivity.