Barry O'Sullivan

Dr. Barry O'Sullivan


Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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6 October 2020 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
YHY. Higashi
Y. Higashi
BKB. Kaczer
B. Kaczer
AVA. S. Verhulst
A. S. Verhulst
BOBarry O'Sullivan
Barry O'Sullivan
NRN. Ronchi
N. Ronchi
JHJ. Van Houdt
J. Van Houdt

22 February 2021 in Journal of Applied Physics
Verified
Journal Article
Open access
PDF file
NANur K Alam
Nur K Alam
SCS. Clima
S. Clima
BOBarry O'Sullivan
Barry O'Sullivan
BKB. Kaczer
B. Kaczer
GPG. Pourtois
G. Pourtois
JHJ. Van Houdt
J. Van Houdt
A first-principles study of native point defects in monoclinic, cubic, two different tetragonal, and five different orthorhombic phases of hafnia (HfO2) is presented. They include vacancy of tri-coordinated and tetra-coordinated oxygen, metal vacancy, interstitial metal, and interstitial oxygen. Defect formation energy, trap depth, and relaxation energy upon optical excitation of defects are listed. The trap depth of oxygen vacancies shows little variation among different phases compared to other defects. Results of the trap depth are compared against measurements and found to have reasonable agreement.

23 March 2021 in Physical Review Materials
Verified
Journal Article
Closed access
PDF file
RIRoman A. Izmailov
Roman A. Izmailov
JSJack W. Strand
Jack W. Strand
LLLuca Larcher
Luca Larcher
BOBarry O'Sullivan
Barry O'Sullivan
Alexander ShlugerAlexander Shluger
Alexander Shluger
VAValeri V. Afanas'EV
Valeri V. Afanas'EV
Charge trapping study at 300 and 77 K in ferroelectric (annealed Al- or Si-doped) and nonferroelectric (unannealed and/or undoped) HfO2 films grown by atomic layer deposition reveals the presence of “deep” and “shallow” electron traps with volume concentrations in the 1019−cm−3 range. The concentration of deep traps responsible for electron trapping at 300 K is virtually insensitive to the oxide doping by Al or Si but slightly decreases in films crystallized by high-temperature annealing in oxygen-free ambient. This behavior indicates that the trapping sites are intrinsic and probably related to disorder in HfO2 rather than to the oxygen deficiency of the film. Electron injection at 77 K allowed us to fill shallow electron traps energetically distributed at ∼0.2 eV. These electrons are mobile and populate states with thermal ionization energies in the range ∼0.6–0.7 eV below the HfO2 conduction band (CB). The trap energy depth and marginal sensitivity of their concentration to crystallization annealing or film doping with Si or Al suggests that these traps are associated with boundaries between crystalline grains and interfaces between crystalline and amorphous regions in HfO2 films. This hypothesis is supported by density functional theory calculations of electron trapping at surfaces of monoclinic, tetragonal, and orthorhombic phases of HfO2. The calculated trap states are consistent with the observed thermal ionization (0.7–1.0 eV below the HfO2 CB) and photoionization energies (in the range of 2.0–3.5 eV below the HfO2 CB) and support their intrinsic polaronic nature.

16 November 2020 in Applied Physics Letters
Verified
Journal Article
Closed access
PDF file
BOBarry O'Sullivan
Barry O'Sullivan
VPV. Putcha
V. Putcha
RIR. Izmailov
R. Izmailov
VAV. Afanas'EV
V. Afanas'EV
ESE. Simoen
E. Simoen
JHJ. Van Houdt
J. Van Houdt
Ferroelectric Si-doped HfO2 is a promising candidate for future generation memory devices. However, such devices are vulnerable to significant threshold voltage shifts resulting from charge trapping in oxide defects. We use complementary characterization and modeling techniques to reveal significant electron trapping/de-trapping behavior, together with a strong temperature dependence of the electron emission kinetics in ferroelectric layers, which results from the onset of polarization of the ferroelectric layer. This can lead to an apparent difference in the defect characteristics in ferroelectric-HfO2 compared to the paraelectric-HfO2 structures they are shown to closely resemble when this contribution is decoupled. The results demonstrate the presence of a defect band closely aligned to the silicon conduction band, which can easily be accessed during device operation.

26 July 2021 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
YHY. Higashi
Y. Higashi
NRN. Ronchi
N. Ronchi
BKB. Kaczer
B. Kaczer
NANur K. Alam
Nur K. Alam
BOBarry O'Sullivan
Barry O'Sullivan
JHJ. Van Houdt
J. Van Houdt
The ferroelectric (FE)-HfO₂-based field-effect transistor (FEFET) is a promising candidate for emerging memory. However, data retention (DR) loss has been flagged as a key issue. Although two models of DR loss in FEFET have been proposed--the charge trapping model and the depolarization model--it is difficult to separate the dominant cause. In this article, simultaneous P-V and I-V measurements are performed which enable separation of these mechanisms. Different behavior of polarization and threshold voltage loss and recovery in a ``set'' state between two types of FEFET structures, metal (TiN)/FE-HfO₂/SiO₂/Si substrate (MFIS) and metal (TiN)/Si/FE-HfO₂/SiO₂/Si-substrate (MSFIS), clarify that the dominant mechanism of the DR loss in both structures is different. In addition, the impact of external bias and interfacial layer (IL) on the DR loss is revealed: the polarization loss is strongly affected by the external bias in both types of FEFET, indicating effective work function (eWF) has a strong impact on depolarization. On the other hand, the thickness and processing of IL strongly impact the charge trapping characteristics. Based on our understanding, excellent improvement of the DR is achieved: memory window ~0.8 V at 85 °C, extrapolated to ten years.

28 September 2022 in IEEE Transactions on Electron Devices
Verified
Journal Article
Closed access
AVA. Veloso
A. Veloso
AJA. Jourdain
A. Jourdain
DRD. Radisic
D. Radisic
RCR. Chen
R. Chen
GAG. Arutchelvan
G. Arutchelvan
NHN. Horiguchi
N. Horiguchi
We report on scaled finFETs built with a novel routing scheme wherein devices are connected via buried power rails (BPRs) from both wafer sides, with tight variability and matching control. On the wafer’s frontside (FS), M1 lines (FSM1) are connected through V0 vias to M0A lines which are then linked to BPR lines by vias called VBPR while also contacting directly the device’s S/D-epi. As for gate wiring, to enable in this work its access from both wafer sides, gate is also connected to BPR via V0 landing on it and on a neighboring M0A line set only on field-oxide. A single-step metallization for M0A and VBPR is preceded by in situ preclean(s) optimized for improved BPR-VBPR contact interface and $\textit{R}_{\text{ext}}$ , as confirmed electrically and by physical analysis. After FS processing, wafer flipping, bonding, and extreme thinning, highly scaled, $\sim $ 323 nm deep nano-through-Si-vias (nTSVs) land on BPR, with tight overlay control and unchanged BPR resistance 26%–29% lower with improved tungsten (W)-fill, connecting them to the first backside (BS) metal level (BSM1). By moving the power delivery network to the BS (BSPDN), besides alleviating FS routing congestion, considerably smaller dynamic and static IR drop values are predicted from on-chip power heat maps generated for a low power 64-bit CPU at 2-nm design rules: 82% and 96% less worst-case values versus a reference configuration, respectively. P/NMOS show similar or even superior $\textit{I}_{\biosc{on}}$ – $\textit{I}_{\biosc{off}}$ after BS processing and extra anneal(s) added for $\textit{V}_{\textit{T}}$ recovery, mobility and bias temperature instability (BTI) improvement—up to 8%/15% higher $\textit{I}_{\biosc{on}}$ linked to anneal selection.