This paper proposes the compact differential evolution (cDE) algorithm. cDE, like other compact evolutionary algorithms, does not process a population of solutions but its statistic description which evolves similarly to all the evolutionary algorithms. In addition, cDE employs the mutation and crossover typical of differential evolution (DE) thus reproducing its search logic. Unlike other compact evolutionary algorithms, in cDE, the survivor selection scheme of DE can be straightforwardly encoded. One important feature of the proposed cDE algorithm is the capability of efficiently performing an optimization process despite a limited memory requirement. This fact makes the cDE algorithm suitable for hardware contexts characterized by small computational power such as micro-controllers and commercial robots. In addition, due to its nature cDE uses an implicit randomization of the offspring generation which corrects and improves the DE search logic. An extensive numerical setup has been implemented in order to prove the viability of cDE and test its performance with respect to other modern compact evolutionary algorithms and state-of-the-art population-based DE algorithms. Test results show that cDE outperforms on a regular basis its corresponding population-based DE variant. Experiments have been repeated for four different mutation schemes. In addition cDE outperforms other modern compact algorithms and displays a competitive performance with respect to state-of-the-art population-based algorithms employing a DE logic. Finally, the cDE is applied to a challenging experimental case study regarding the on-line training of a nonlinear neural-network-based controller for a precise positioning system subject to changes of payload. The main peculiarity of this control application is that the control software is not implemented into a computer connected to the control system but directly on the micro-controller. Both numerical results on the test functions and experimental results on the real-world problem are very promising and allow us to think that cDE and future developments can be an efficient option for optimization in hardware environments characterized by limited memory.

The H-bridge-based multilevel active rectifier is an attractive topology that allows feeding of multiple dc loads. The main control problem is to manage state variables (one current plus dc voltages) with only switching functions. In this paper, three PI-based solutions are discussed, and the tuning of the best solution is addressed in case resonant controllers are used instead of classical integrators. Moreover, practical problems such as the implementation and the influence of phase-locked-loop systems and of analog filters (first order and Butterworth) on the measurements are discussed.

The automated design of synchronous reluctance (SyR) motors based on multiobjective genetic optimization and finite-element analysis is considered in this paper. Three types of barrier shapes are considered, all described by an effective limited set of input variables. The three solutions are investigated to establish which of the geometries can give the best torque output and also which one represents the best compromise between output performance and computational time. The analysis presented in this paper shows that SyR motors designed automatically can give a good performance and can be designed in a reasonable time, and it is also shown that not all design degrees of freedom are useful in terms of motor performance. Two prototypes of automatically designed machines have been fabricated and experimentally compared with a third prototype designed according to state-of-the-art design principles.

This paper focuses on the design of a controller for a high-voltage high-power single-phase active rectifier, designed for, but not limited to, traction field applications. The rectifier should absorb current with low harmonic content to reduce the environmental electromagnetic pollution and to eliminate the disturbances to the on-board communication equipment. In addition, it should allow the elimination of the heavy and bulky transformer, reducing encumbrance and cost. A multilevel H-bridge single-phase configuration has been chosen and the design has been fully investigated with the help of theoretical analysis, simulations, and experiments.

A novel algorithm for fundamental frequency and harmonic components detection is presented in this paper. The technique is based on a real-time implementation of discrete Fourier transform, and it allows fast and accurate estimation of fundamental frequency and harmonics of a distorted signal with variable fundamental frequency. It is suitable for active shunt filter applications, when fast and accurate tracking of the reference signal is required to achieve a good control performance. The main application for the algorithm is aircraft ac power systems, where the fundamental frequency can be either fixed on 400 Hz and its actual value fluctuates around the nominal value, or variable in the range 360-900 Hz. Hence, a real-time estimation of fundamental frequency is essential for active filter control. The proposed algorithm has been at first implemented in Matlab/Simulink for computer simulation, and it has been compared with a Phase Locked Loop (PLL) algorithm for frequency detection and the synchronous dq reference method for harmonic detection. Experimental tests have been carried out in order to validate the simulation results. The distorted current absorbed by a nonlinear load is analyzed and processed by means of a digital implementation of the algorithm running on the active shunt power filter control DSP, in order to calculate the active filter compensating current.

The automatic design of synchronous reluctance (SyR) machines is considered in this paper by means of finite-element analysis and multiobjective optimization algorithms (MOOAs). The research focuses on the design of the rotor geometry, which is the key aspect of the SyR machine design. In particular, the performance of three popular MOOAs is analyzed and compared in terms of quality of the final design and computational time. A procedure to minimize the computational burden of the optimized design process is introduced and applied to a three-layer and a five layer rotor. Two prototypes experimentally demonstrate the feasibility of the design procedure.