Fuzzy-logic-based inference techniques provide efficient solutions for control problems in classical and emerging applications. However, the lack of specific design tools and systematic approaches for hardware implementation of complex fuzzy controllers limits the applicability of these techniques in modern microelectronics products. This paper discusses a design strategy that eases the implementation of embedded fuzzy controllers as systems on programmable chips. The development of the controllers is carried out by means of a reconfigurable platform based on field-programmable gate arrays. This platform combines specific hardware to implement fuzzy inference modules with a general-purpose processor, thus allowing the realization of hybrid hardware/software solutions. As happens to the components of the processing system, the specific fuzzy elements are conceived as configurable intellectual property modules in order to accelerate the controller design cycle. The design methodology and tool chain presented in this paper have been applied to the realization of a control system for solving the navigation tasks of an autonomous vehicle.

Non-fungible tokens (NFTs) are widely used in blockchain to represent unique and non-interchangeable assets. Current NFTs allow representing assets by a unique identifier, as a possession of an owner. The novelty introduced in this paper is the proposal of smart NFTs to represent IoT devices, which are physical smart assets. Hence, they are also identified as the utility of a user, they have a blockchain account (BCA) address to participate actively in the blockchain transactions, they can establish secure communication channels with owners and users, and they operate dynamically with several modes associated with their token states. A smart NFT is physically bound to its IoT device thanks to the use of a physical unclonable function (PUF) that allows recovering its private key and, then, its BCA address. The link between tokens and devices is difficult to break and can be traced during their lifetime, because devices execute a secure boot and carry out mutual authentication processes with new owners and users that could add new software. Hence, devices prove their trusted hardware and software. A whole demonstration of the proposal developed with ESP32-based IoT devices and Ethereum blockchain is presented, using the SRAM of the ESP32 microcontroller as the PUF.

This paper describes the design and implementation of a fuzzy control system for a car-like autonomous vehicle. The problem addressed is the diagonal parking in a constrained space, a typical problem in motion control of nonholonomic robots. The architecture proposed for the fuzzy controller is a hierarchical scheme which combines seven modules working in series and in parallel. The rules of each module employ the adequate fuzzy operators for its task (making a decision or generating a smoothly varying control output), and they have been obtained from heuristic knowledge and numerical data (with geometric information) depending on the module requirements (some of them are constrained to provide paths of near-minimal lengths). The computer-aided design tools of the environment Xfuzzy 3.0 (developed by some of the authors) have been employed to automate the different design stages: 1) translation of heuristic knowledge into fuzzy rules; 2) extraction of fuzzy rules from numerical data and their tuning to give paths of near-minimal lengths; 3) offline verification of the control system behavior; and 4) its synthesis to be implemented in a true robot and be verified on line. Real experiments with the autonomous vehicle ROMEO 4R (designed and built at the Escuela Superior de Ingenieros, University of Seville, Seville, Spain) demonstrate the efficiency of the described controller and of the methodology followed in its design.

Fuzzy controllers are used in many applications because of their rapid design by translating heuristic knowledge, robustness against perturbations, and smoothness in the control action. However, they require parallel processing and special operators (such as fuzzification or defuzzification) which are not available in standard digital signal processors (DSPs), thus complicating their direct implementation. This paper describes an efficient design methodology that allows starting with any kind of fuzzy controller and subsequently transforming it until a system suitable for easy DSP implementation is obtained. Such methodology is greatly aided by the design environment Xfuzzy 3. The parking problem of an autonomous robot is described to illustrate the steps of this methodology. Real experiments with the autonomous robot ROMEO 4R demonstrate efficiency of the designed fuzzy controller embedded into a stand-alone card based on a fixed-point DSP from Texas Instruments.

This paper presents a method to simultaneously improve the quality of the identifiers, secret keys, and random numbers that can be generated from the start-up values of standard static random access memories (SRAMs). The method is based on classifying memory cells after evaluating their start-up values at multiple measurements in a registration phase. The registration can be done without unplugging the device from its application context, and with no need for a complex laboratory setup. The method has been validated experimentally with standard low-power SRAM modules in two different application specific integrated circuits (ASICs) fabricated with the 90-nm TSMC technology. The results show that with a simple registration the length of the identifiers can be reduced by 45%, the worst case bit error probability (which defines the complexity of the error correcting code needed to recover a secret key) can be reduced by 64%, and the worst case minimum entropy value is improved, thus reducing the number of bits that have to be processed to obtain full entropy by 81%. The method can be applied to standard digital designs by controlling the external power supply to the SRAM using software or by incorporating simple circuitry in the design. In the latter case, a module for implementing the method in an ASIC designed in the 90-nm TSMC technology occupies an active area of 42, 025 μm ² .