High resistance fault poses an enormous challenge to the existing algorithms of fault detection and fault classification. In this paper, the standard deviation and accumulation method are employed to perform the fault detection and classification. It is primarily built in two stages. Firstly, the standard deviations for the measured current’s signals of the local and remote terminals is computed to extract the fault feature. Secondly, the cumulative approach is used to enlarge the fault feature to perform the high resistance fault. The proposed scheme is known as Standard Deviation Index (SDI), and it is obtained for the three phases and zero sequence. The proposed algorithm has been tested through different fault circumstances such as multiple faults locations, fault resistances, and fault inception time. Moreover, far-end faults with high-resistance, faults happened nearby the terminal, faults considering variable loading angle, sudden load change, different sampling frequency, bad signaling and a fault occurred in the presence of series compensation are also discussed. The results show that the proposed scheme performed remarkably well regarding the fault with resistance up to 1.5kΩ and can be detected within a millisecond after the fault inception. Additionally, the computational simplicity that characterizes the processes makes it more efficient and suitable for domain applications.

To perform a fast faulted‐phase selection under the power swing in a series compensated line with a thyristor‐controlled series capacitor (TCSC) is an extreme challenge facing the transmission line protection schemes. Thus, this paper proposes a new scheme for recognizing the faulted‐phase in TCSC‐compensated transmission lines during the power swing. Primarily, the fault feature is extracted by using a modified Interclass correlation coefficient. The scheme utilizes the system‐current samples during the fault period and system‐current samples during the health state as two variables for obtaining the modified interclass correlation coefficient. Then a cumulative approach is used to enlarge the fault feature. The proposed scheme has been subjected to a wide variety of tests through different faults circumstances under different compensation levels. The experimental results have shown good performance against the high impedance/resistance fault under different TCSC‐compensation levels during the power swing. Also, the results showed a distinction in terms of time response due to its simple computation process.

Fast fault detection in the Thyristor-controlled series capacitors “TCSC” compensated transmission line is the most challenging for many of the conventional fault detection methods. This paper proposes a new algorithm for fast fault identification in TCSC-compensated line based on concordance correlation of the current signals during the fault interval with corresponding current signals at the pre-fault interval. It is observed that the concordance correlation of the current signals at the present state with the same current signals at the previous state (just a few-cycle past) is very-strong during the health state and very weak when there is a fault state. Based on this and with the assistance of the cumulative approach, a fault detection index “ $\mathit{Cdx}$” has been achieved. The proposed method has been tested through different fault circumstances including different compensation levels of TCSC device. Also, the proposed algorithm has been verified successfully with close in fault, high impedance fault, different sampling frequency, sudden load switching, load flow change and multi-machine system. The experimental results shown that the proposed method is good in terms of time response regardless of the compensation level, and therefore it is more efficient for series-compensated transmission lines protection.