In this brief, based on upset physical mechanism together with reasonable transistor size, a robust 10T memory cell is first proposed to enhance the reliability level in aerospace radiation environment, while keeping the main advantages of small area, low power, and high stability. Using Taiwan Semiconductor Manufacturing Company 65-nm CMOS commercial standard process, simulations performed in Cadence Spectre demonstrate the ability of the proposed radiation-hardened-by-design 10T cell to tolerate both 0 → 1 and 1 → 0 single node upsets, with the increased read/write access time.
28 March 2018 in IEEE Transactions on Antennas and Propagation
This communication examines how to improve the squinted radiation patterns produced by the balanced antipodal Vivaldi antenna (BAVA) while retaining its cross-polarization levels. In particular, we propose discarding the redundant substrate between the metal flares of the BAVA and implementing dual-scale slotted edges to improve the radiation characteristics. The gain at both the lower and the higher end of the band is significantly enhanced without increasing the antenna size. Moreover, significant reduction in the beam squint relative to the conventional BAVA designs is achieved. A microstrip-to-stripline transition is also introduced to improve low-end matching. The final design operates over 10-40 GHz with return loss <;-10 dB, providing sufficient bandwidth and match for a variety of applications at millimeter-wave frequencies. Numerical and experimental assessments to validate the proposed antenna design are conducted.
9 November 2017 in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The use of error-correction codes (ECCs) with advanced correction capability is a common system-level strategy to harden the memory against multiple bit upsets (MBUs). Therefore, the construction of ECCs with advanced error correction and low redundancy has become an important problem, especially for adjacent ECCs. Existing codes for mitigating MBUs mainly focus on the correction of up to 3-bit burst errors. As the technology scales and cell interval distance decrease, the number of affected bits can easily extend to more than 3 bit. The previous methods are therefore not enough to satisfy the reliability requirement of the applications in harsh environments. In this paper, a technique to extend 3-bit burst error-correction (BEC) codes with quadruple adjacent error correction (QAEC) is presented. First, the design rules are specified and then a searching algorithm is developed to find the codes that comply with those rules. The H matrices of the 3-bit BEC with QAEC obtained are presented. They do not require additional parity check bits compared with a 3-bit BEC code. By applying the new algorithm to previous 3-bit BEC codes, the performance of 3-bit BEC is also remarkably improved. The encoding and decoding procedure of the proposed codes is illustrated with an example. Then, the encoders and decoders are implemented using a 65-nm library and the results show that our codes have moderate total area and delay overhead to achieve the correction ability extension.
3 August 2021 in IEEE Transactions on Circuits and Systems I: Regular Papers
As technology scaling down, the sensitivity of SRAM cells to radiation-induced Single Event Upsets (SEUs) increases, and Single Event Multiple Node Upsets (SEMNUs) due to charge sharing has also become one of the major concerns in memory cell designs. In this paper, a high-reliability radiation hardened memory cell (RH-14T) is proposed to mitigate SEMNUs. SPICE simulations and 3D technology computer aided design mixed-mode simulations were performed to verify the high robustness of the RH-14T cell to SEUs. Compared with previous radiation hardened memory cells, the proposed RH-14T cell has similar read access time, smaller write access time, and the read access time and write access time are less sensitive to process variations. The Read Static Noise Margin (RSNM) and Write Margin (WM) of the RH-14T cell are larger than those of the unhardened conventional 6T SRAM cell. The improvement of reliability is often a trade-off with area, power consumption and performance. In order to achieve high reliability, the RH-14T cell employs more transistors, so it has 1.5 times the power consumption overhead of 6T and a larger area penalty.
27 April 2022 in IEEE Transactions on Circuits and Systems I: Regular Papers
Computing systems working in harsh environment is prone to suffer from radiation-induced soft errors; for example, Single Event Upsets (SEUs) and Single Event Transients (SETs) are the major reliability issue for circuits fabricated with nanoscale technology nodes. In this paper, we proposed a low-cost SET and SEU error tolerant flip-flop (SETU-TOFF). Based on the traditional flip-flop, two high-level sensitive redundant latches are added to latch the input data at different times, and a voter is designed for the correct output. It removes the timing overhead of temporal redundancy from the critical path of the systems. Comparing with the existing designs presented in literatures, SETU-TOFF has comprehensive fault tolerant capability with lower overheads; moreover, it doesn't increase significant latency of the flip-flops. We use the SETU-TOFF cells to protect a pipeline of an OpenRISC microprocessor. Fault injection simulations show that SETU-TOFF can achieve 100% protection for the pipeline with negligible performance loss; additionally, it can detect and correct errors in real time without extra system control logic and clocks for errors recovery.
21 December 2023 in IEEE Transactions on Electron Devices
The effects of 1 MeV electron irradiation on $\beta $ -Ga $_{{\text{2}}}$ O $_{\text{3}}$ Schottky barrier diodes (SBDs) were studied in this work. After an electron irradiation fluence of 1 $\times$ 10 $^{\text{16}}$ cm $^{\text{-2}}$ , the forward turn-on voltage of $\beta $ -Ga $_{\text{2}}$ O $_{\text{3}}$ SBD decreased from 0.82 to 0.77 V, the reverse current at $-$ 100 V decreased by 79%, the height of the Schottky barrier decreased from 1.01 to 0.92 eV, and the ideality factor increased from 1.04 to 1.13, indicating that the electrical characteristics of the $\beta $ -Ga $_{\text{2}}$ O $_{\text{3}}$ SBD had degraded. Through C – V testing, a carrier removal rate of 7.9 cm $^{\text{$ - $1}}$ was determined. The deep-level transient spectroscopy (DLTS) results showed that the concentration of native defects at the E $_{\textit{C}}$$-$ 0.75 position increased sharply after irradiation, which may be the main reason for the degradation of the $\beta $ -Ga $_{\text{2}}$ O $_{\text{3}}$ SBD performance. The research results reveal the impact of high-energy electron irradiation on the $\beta $ -Ga $_{\text{2}}$ O $_{\text{3}}$ SBD, providing a basis for its application in harsh radiation environments.