The main challenge associated with sodium-ion battery (SIB) anodes is a search for novel candidate materials with high capacity and excellent rate capability. The most commonly used and effective route for graphene-based anode design is the introduction of in-plane “hole” defects via nitrogen-doping; this creates a spacious reservoir for storing more energy. Inspired by mountains in nature, herein, we propose another way – the introduction of blistering in graphene instead of making “holes”; this facilitates adsorbing/inserting more Na⁺ ions. In order to properly answer the key question: ““protrusions” or “holes” in graphene, which is better for sodium ion storage?”, two types of anode materials with a similar doping level were designed: a phosphorus-doped graphene (GP, with protrusions) and a nitrogen-doped graphene (GN, with holes). As compared with GN, the GP anode perfectly satisfies all the desired criteria: it reveals an ultrahigh capacity (374 mA h g⁻¹ after 120 cycles at 25 mA g⁻¹) comparable to the best graphite anodes in a standard Li-ion battery (∼372 mA h g⁻¹), and exhibits an excellent rate capability (210 mA h g⁻¹ at 500 mA g⁻¹). In situ transmission electron microscopy (TEM) experiments and density functional theory (DFT) calculations were utilized to uncover the origin of the enhanced electrochemical activity of “protrusions” compared to “holes” in SIBs, down to the atomic scale. The introduction of protrusions through P-doping into graphene is envisaged to be a novel effective way to enhance the capacity and rate performance of SIBs.

Ultrathin nanoporous Fe₃O₄–carbon nanosheets (NNSs) with a high surface area of 229 m² g⁻¹ were synthesized by using a two-step method. The high capacitance of 163.4 F g⁻¹ was achieved by utilizing such NNSs electrodes due to their unique feature, which is much higher than those of previously reported Fe₃O₄ hybrid products. The interconnected porous framework surface greatly enhanced charge transfer due to larger interfaces, and carbon nanopillars between nanosheet layers brought high conductivity.

Although several high-k insulators have been deposited on the diamond for metal-insulator-semiconductor field effect transistors (MISFETs) fabrication, the k values and current output are still not fully satisfactory. Here, we present a high-k ZrO2 layer on the diamond for the MISFETs. The k value for ZrO2 is determined by capacitance-voltage characteristic to be 15.4. The leakage current density is smaller than 4.8 × 10−5 A·cm−2 for the gate voltage ranging from −4.0 to 2.0 V. The low on-resistance MISFET is obtained by eliminating source/drain-channel interspaces, which shows a large current output and a high extrinsic transconductance. The high-performance diamond MISFET fabrication will push forward the development of power devices.

Effects of nitrogen incorporation on the interface chemical bonding states, optical dielectric function, band alignment, and electrical properties of sputtering-derived HfTiO high-k gate dielectrics on GaAs substrates have been studied by angle resolved X-ray photoemission spectroscopy (ARXPS), spectroscopy ellipsometry (SE), and electrical measurements. XPS analysis has confirmed that the interfacial layer of a HfTiO/GaAs gate stack is suppressed effectively after nitrogen incorporation. Analysis by SE has confirmed that reduction in band gap and increase in refractive index are observed with the incorporation of nitrogen. Reduction in valence band offset and increase in conduction band offset have been observed for a HfTiON/GaAs gate stack. Electrical measurements based on metal-oxide-semiconductor (MOS) capacitors have shown that the MOS capacitor with a HfTiON/GaAs stacked gate dielectric annealed at 600 °C exhibits low interface-state density (2.8 × 10¹² cm⁻² eV⁻¹), small gate leakage current (2.67 × 10⁻⁵ A cm⁻² at V_g = V_fb + V), and large dielectric constant (25.8). The involved mechanisms may originate from the decrease in the interface state density and the increase in the conduction band offset. The appropriate band offset relative to GaAs and excellent interface properties render HfTiON/GaAs as promising gate stacks in future III–V-based devices.