A nickel-tungsten alloy film was deposited using an electrodeposition process. The tungsten concentration in the nickel-tungsten alloy was controlled by the applied current density. The surface morphology, micro-structure, internal stress, and hardness were characterized as a single-layer structure. Hardness increased as the tungsten content increased, but micro-cracks occurred on the surface. A multi-layered structure was selected to increase the hardness without micro-cracks. The multi-layered nickel-tungsten alloy film was deposited to form two types: functional periodic materials and functional graded materials. These multi-layered structures were deposited by changing the applied current density periodically and gradually, respectively, during the deposition process. The mechanical properties, such as internal stress and hardness of the nickel-tungsten alloy, were characterized as a function of the tungsten concentration of the nickel-tungsten alloy film. As the number of periods increased, the internal stress decreased, and micro-cracks were removed from the surface. However, the gradually varied nickel-tungsten alloy had higher internal stress than the periodically varied alloy. Similar hardness was observed because the concentration of nickel-tungsten film at the top of the multi-layered structure was the same. Overall, we demonstrated enhanced mechanical properties, including low internal stress and high hardness, of concentration periodically graded nickel-tungsten alloy.

This study presents the development of a modified polyimide (MPI) with low dielectric properties and low-temperature curing capability for high-frequency flexible printed circuit boards (FPCBs). MPI was cured using dicumyl peroxide (DCP) at 80–140 °C through a radical process optimized via DSC analysis, while Fourier-transform infrared (FT-IR) confirmed the elimination of C=C bonds and the formation of imide structures. The MPI film exhibited low dielectric constants (D_k) of 1.759 at 20 GHz and 1.734 at 28 GHz, with ultra-low dissipation factors (D_f) of 0.00165 and 0.00157. High-frequency S-parameter evaluations showed an excellent performance, with S11 of −32.92 dB and S21 of approximately −1 dB. Mechanical reliability tests demonstrated a strong peel strength of 0.8–1.2 kgf/mm (IPC TM-650 2.4.8 standard) and stable electrical resistance during bending to ~6 mm radius, with full recovery after severe deformation. These results highlight MPI’s potential as a high-performance dielectric material for next-generation FPCBs, combining superior electrical performance, mechanical flexibility, and compatibility with low-temperature processing.

Recent advances in chiplet architectures, heterogeneous integration, 2.5D/3D packaging, high-performance computing, and RF applications have increased the demand for high-density vertical interconnects and low-loss packaging platforms. Glass substrates have attracted considerable attention for next-generation advanced packaging because of their low dielectric loss, high dimensional stability, smooth surface, and compatibility with large-area panel-level processing. Through-glass vias (TGVs) are essential vertical interconnect structures that enable the electrical integration of glass substrates. This focused review summarizes TGV technologies for glass-based advanced packaging from the perspectives of via formation, seed layer deposition, metallization, Cu filling, defect formation, reliability, and plugging-based alternative architectures. Representative TGV formation methods, including laser drilling, selective laser etching, laser-induced deep etching, wet/dry etching, and photosensitive glass processing, are compared. Metallization approaches based on sputtering, electroless plating, ALD/CVD, and hybrid processes are discussed together with Cu electroplating strategies such as conformal plating, bottom-up filling, pulse or pulse-reverse plating, and engineered-geometry filling. Key defects, including voids, seams, pinch-off, seed discontinuity, Cu/glass interfacial delamination, glass cracking, and Cu protrusion, are reviewed in relation to thermomechanical reliability. Finally, polymer/dielectric plugging, plugging/re-drilling, conductive paste plugging, and hybrid Cu/plugging structures are discussed as application-specific alternatives for balancing electrical performance, reliability, manufacturability, yield, and cost.

Sensor devices are widely used for increasing human convenience to detect various environmental parameters such as humidity, temperature, pressure and lots of hazardous chemicals. Also, specific sensor devices are utilized for private security using iris or finger print. Among them, humidity sensors are widely utilized in the fields of food science, meteorology, preservation of relics, so on [1-2]. Therefore, measuring the humidity is substantial interest in research fields. For detecting the humidity, many materials including silicon, silicon oxide, metal oxide, conducting polymers, and carbon group materials have been used. Among them, silicon oxide is considered because of its low process cost and simple fabrication process. Moreover, silicon oxide is hydrophilic materials that water molecules were easily adsorbed on its surface. In order to increasing sensing characteristics, lots of researchers put an enormous efforts such as increasing surface to volume ratio, improving the structure of sensor device, and doping the impurities to electrode materials and so on. Among them, increasing the effective surface area is the most common and simple way to enhancing the sensing characteristics. Electrodeposition assisted stripping (EAS) process is the one of the most effective kerf-free method for obtaining the thin silicon film [3]. The EAS process is using a spalling which is the unique mode of brittle fracture, caused by high tensile stress. High tensile stressed layer can induce fracture at a certain depth, parallel to substrate interface, which was deposited by electrochemical deposition of nickel layer on the silicon surface. In order to control the thickness of spalled silicon layer, current density is the critical parameter of electrodeposition process. Metal assisted chemical etching (MACE) process is utilized to fabricate the porous structure. The MACE process is using the anisotropic etching phenomenon through metal catalysts in wet etching solution, which is consisted of hydrogen peroxide and hydrofluoric acid. Compared to dry etching process, MACE can fabricate the high aspect ratio of porous structure much easier and cheaper than vacuum based process. In this study, we fabricated the porous silicon oxide film using EAS, MACE and oxidation process and it was characterized as humidity sensor device. Before the EAS process, the thickness of 20 and 200 nm of titanium and nickel layer was deposited by E-beam evaporator. The current density of 10 mA/cm² was conducted to deposit the high tensile stressed nickel layer in watt bath which was consisted of nickel sulfate, nickel chloride and sodium citrate. The thickness of spalled silicon layer was around 90 ~ 100 um. After the spalling the silicon, MACE and oxidation process was conducted in consecutive order. Tin and silver electro-less deposition was conducted to make the metal catalyst and hydrogen peroxide and hydrofluoric acid were used for etching electrolyte. The oxidation process was conducted in ambient air condition at 1000 ℃ in 3-zone quartz tube furnace. Surface morphology and thickness of spalled silicon were observed with field-emission scanning electron microscope (FE-SEM). Electrical characteristics of porous Si humidity sensor were characterized by 2-point probe station. The humidity was controlled by changing the ratio of dry gas to wet gas. Variation of capacitance of humidity sensor was measured and recorded using an LCR meter. The sensitivity is represented by (C_Dry - C_RH) / C_RH, where C_RH is the capacitance with the varied humidity and C_Dry is the capacitance with the lowest humidity. Moreover, response and the recovery time are defined as the time to reach 90% of the total variation. In order to verifying the humidity sensing mechanism, electrochemical impedance spectroscopy (EIS) analysis was conducted. From the EIS results, proper equivalent circuit of humidity sensor and sensing mechanism were suggested. REFERENCES [1] P. Hurjes, A. Kovacs, Cs. Ducso, M. Adam, B. Muller, U. Mescheder, “Porous silicon-based humidity sensor with interdigital electrodes and internal heaters”, Sensors and Actuators B: Chemical 2003, 95, 140-144. [2] Z.M. Rittersma, A. Splinter, A. Bodecker, W. Benecke, “A novel surface-micromachined capacitive porous silicon humidity sensor” Sensors and Actuators B: Chemical 2000, 68, 210-217. [3] Youngim Kwon, Changyeol Yang, Sang-Hwa Yoon, Han-Don Um, Jung-Ho Lee and Bongyoung Yoo, “Spalling of a Thin Si Layer by Electrodeposit-Assisted Stripping”, Applied Physics Express, 2013, 6 (11), 116502.