This paper presents a high-efficiency gallium nitride Doherty power amplifier (DPA) using an integrated compensating reactance (CR) for broadband operation. With an additional quarter-wavelength transmission line integrated in the peaking amplifier output, a CR is generated to compensate the load impedance of the carrier amplifier in the low-power region and thus enhance the back-off efficiency over a wide frequency range without affecting the Doherty load modulation at saturation. For this purpose, a peaking output matching network (OMN) is employed to convert the output impedance of the peaking device into quasi-short circuit when it is off and achieve proper impedance matching when it is on. A two-point matching technique using the transmission (ABCD) matrix is employed to design such desired OMN. Measurement results show that the DPA has a 6-dB back-off efficiency of 50%-55% and a saturated efficiency of 57%-71% over the frequency band of 1.7-2.8 GHz (49% fractional bandwidth). When driven by a 20-MHz long term evolution modulated signal at 6.5-dB back-off power, the DPA can achieve an average efficiency of more than 50% with high linearity after linearization over the design frequency band.

This paper proposes a multiobjective Bayesian optimization strategy to deal with the complex matching problem of designing a broadband 20-W gallium nitride Doherty power amplifier (DPA). Applying the proposed method, the DPA's matching networks are optimized to align the desired and the realized impedance trajectories both at saturation and power backoff from 1.5 to 2.4 GHz. By combining a programming environment with the commercial electronic design automation (EDA) software, the optimization process is implemented automatically. Comparison designs reveal that the proposed method outperforms the built-in optimizer of the commercial EDA software for broadband DPA designs. When tested with a single-carrier 20 MHz long-term evolution signal, the measured results show that the DPA achieves an average efficiency of 45.3%-53.6% at 7 dB backoff across the band, with the adjacent channel power ratio levels better than -45.6 dBc after using digital predistortion.

This letter presents an improved Doherty power amplifier (DPA) for high-efficiency and wideband operations. To achieve the impedance transformations both in the low power region and at saturation, a design approach is proposed to determine the desired minimum phase delays of the carrier and peaking output matching networks, which can simplify the load modulation network of the DPA and extend the bandwidth. For verification, a 1.6-2.2 GHz asymmetric DPA was designed and measured. The designed DPA can deliver an efficiency of 51%-55% at 10 dB back-off power over the whole band. For a 20 MHz LTE signal, an average efficiency of higher than 50% can be achieved at 36 dBm average output power with the linearity of -48 dBc after linearization across the band.

In this article, a load-modulation enhanced wideband compact high-efficiency millimeter-wave (mm-wave) gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) synchronous Doherty power amplifier (DPA) is presented. A synchronous DPA architecture is used to ensure the optimal saturation performance at the mm-wave band. Based on the analysis of load-modulation behavior, the bandwidth of the DPA can be extended by decreasing the phase dispersion factor $\alpha $ . A simple optimal tuning-based method is proposed to design an equivalent $\lambda $ /4 transmission line (EQWTL) with the minimal $\alpha $ for a given topology. Furthermore, the influence of the power division ratio $\sigma $ on the proposed DPA’s load-modulation behavior has also been analyzed and a proper load modulation can be realized by splitting more power to the peaking branch properly. For verification, a 24–28-GHz GaN MMIC synchronous DPA has been designed using a 0.15- $\mu \text{m}$ GaN on silicon carbide high-electron-mobility transistor process. Both the load modulation and the matching of the fundamental and the second harmonic load impedances can be realized by a modified bandpass-type EQWTL with a minimal $\alpha $ easily. Experimental results show that the fabricated DPA can achieve the output power of 35.4–36 dBm and the power-added efficiency (PAE) of 27.8%–36.8% at saturation. The PAE at 6-dB power back-off (PBO) is 18.3%–30.1% and the 9-dB PBO PAE is higher than 14.3% in the whole frequency band. An average PAE of 27.4% with good linearity is obtained when excited by a 400-MHz modulated signal after linearization.

In this paper, a Doherty power amplifier (DPA) using a novel three-port harmonic injection network (HIN) to extend its high-efficiency range is proposed. With the help of a part of the three-port HIN, which is placed between the carrier and peaking branches, the optimal drain fundamental frequency termination for the carrier device at back-off and saturation can be realized simultaneously thus enhancing the efficiency at back-off significantly. Meanwhile, this three-port HIN can also realize second harmonic drain terminations for the carrier and peaking device with the quasi-open and quasi-short circuit at the current plane, respectively. Consequently, the saturated power ratio between peaking and carrier devices is increased, which further extends the back-off range of the asymmetric drain-biased DPA. For demonstration purposes, an extended high efficiency range DPA was designed and fabricated using commercially available GaN HEMT (Cree CGH 40010F) devices. Measured results for this novel idea gave drain efficiencies better than 62.5% at 9-9.5 dB back-off point from 1.60 to 1.95 GHz.