Background: Intestinal epithelial barrier (IEB) dysfunction is related to multiple gastrointestinal disorders, notably inflammatory bowel disease (IBD). Betulinic acid (BA), a compound derived from birch bark, has demonstrated potential therapeutic benefits in IBD. Nevertheless, the impact of BA on IEB function has not been fully elucidated. Methods: The current study aimed to explore the potential underlying mechanisms of BA in dextran sodium sulfate (DSS)-induced IBD in mice and co-culture models involving Caco-2/HT29-MTX-E12 cell monolayers or mouse intestinal organoids (IOs) in conjunction with macrophages stimulated by lipopolysaccharide (LPS). Results: In vivo, BA treatment significantly improved body weight and colon length, alleviated disease activity index (DAI) scores, and reduced colonic histopathological injury in IBD mice. In vitro, BA reduced the flux of FITC-dextran; increased the TEER; and decreased the production of IL-6, IL-1β, and TNF-α while increasing IL-10 mRNA levels. Additionally, BA enhanced IEB formation by upregulating ZO-1, occludin (OCLN), and claudin-1 (CLDN1). Molecular docking studies revealed significant docking scores and interactions between BA and PPAR-γ. Moreover, BA significantly upregulated PPAR-γ protein expression, decreased NF-κB and MLC2 phosphorylation, and reduced MLCK protein expression. However, this effect was reversed by GW9662, an effective PPAR-γ antagonist. Conclusions: The findings reveal that BA mitigates IBD by safeguarding the intestinal barrier against dysfunction. This effect may be attributed to its ability to suppress inflammation and enhance the expression of tight junction proteins by modulating the PPAR-γ/NF-κB signaling pathway.

This paper describes the scan test challenges and techniques used in the Godson-3 microprocessor, which is a scalable multicore processor based on the SMOC (scalable mesh of crossbar) on-chip network and targets high-end applications. Advanced techniques are adopted to achieve the scalable, low-power and low-cost scan architecture at the challenge of limited I/O resources and large scale of transistors. To achieve a scalable and flexible test access, a highly elaborate TAM (test access mechanism) is implemented with supporting multiple test instructions and test modes. Taking advantage of multiple cores embedding in the processor, scan partitions are employed to reduce test power and test time, and test compression with more than 10X compression ratio are utilized to decrease the scan chain length. To further decrease test time, a data-synchronous-comparator (DSC) is proposed for comparing the scan responses of the identical cores.

This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n-1, m, 3) convolutional code is presented. When the proposed four theorems are satisfied, the encoder can avoid two and any odd erroneous bit cancellations, handle one unknown bit (X bit) and diagnose one erroneous bit. Two types of encoders are proposed to implement the check matrix of the convolutional code. A large number of X bits can be tolerated by choosing a proper memory size and weight of check matrix, which can also be obtained by an optimized input assignment algorithm. Some experimental results would verify the efficiency of the proposed optimized algorithm.