Perovskite solar cells (PSCs) have emerged as a promising contender in photovoltaics, owing to their rapidly advancing power conversion efficiencies (PCEs) and compatibility with low-temperature solution processing techniques. Single-junction architectures reveal inherent limitations imposed by the Shockley–Queisser (SQ) limit, motivating adoption of a dual-absorber structure comprising Cs₄CuSb₂Cl₁₂ (CCSC) and Cs₂TiI₆ (CTI)—lead-free perovskite derivatives valued for environmental benignity and intrinsic stability. Comprehensive theoretical screening of 26 electron/hole transport layer (ETL/HTL) candidates identified SrTiO₃ (STO) and CuSCN as optimal charge transport materials, producing an initial simulated PCE of 16.27%. Subsequent theoretical optimization of key parameters—including bulk and interface defect densities, band gap, layer thickness, and electrode materials—culminated in a simulated PCE of 30.86%. Incorporating quantifiable practical constraints, including radiative recombination, resistance, and FTO reflection, revised simulated efficiency to 26.60%, while qualitative analysis of additional factors follows later. Furthermore, comparing multiple algorithms within this theoretical framework demonstrated eXtreme Gradient Boosting (XGBoost) possesses superior predictive capability, identifying CTI defect density as the dominant impact on PCE—thereby underscoring its critical role in analogous architectures and offering optimization guidance for experimental studies. Collectively, this theoretical research delineates a viable pathway toward developing stable, environmentally sustainable PSCs with high properties.

With the rapid development of artificial intelligence (AI) and big data applications, the memory wall bottleneck inherent in traditional von Neumann architectures has become increasingly prominent. As a promising solution, computing-in-memory (CIM) technology tightly integrates computing and storage units, significantly reducing the energy consumption and latency associated with frequent data movement between memory and processors. This paper reviews recent advances in CIM technology from three perspectives: circuit design, architectural optimization, and application innovation. Key techniques such as mixed-signal computing and heterogeneous memory integration are analyzed at the circuit level. The evolution from integer-only to floating-point (FP) and hybrid integer-floating-point (INT-FP) computing paradigms is discussed at the architectural level. Optimization strategies for emerging scenarios, such as on-chip training and simultaneous localization and mapping (SLAM) or neural radiance field (NeRF)-based environmental modelling, are explored at the application level. The findings suggest that CIM technology is evolving from domain-specific accelerators toward general-purpose computing platforms, with the potential to reshape next-generation intelligent computing architectures.