The detection of faint, fast-moving objects such as space debris, in optical data is a major challenge due to their low signal-to-background ratio and short visibility time. This work addresses this issue by implementing the Stack-CNN algorithm, originally designed for offline analysis, on an FPGA-based platform to enable real-time triggering capabilities in constrained space hardware environments. The Stack-CNN combines a stacking method to enhance the signal-to-noise ratio of moving objects across multiple frames with a lightweight convolutional neural network optimized for embedded inference. The FPGA implementation was developed using a Xilinx Zynq Ultrascale+ platform and achieves low-latency, power-efficient inference compatible with CubeSat systems. Performance was evaluated using both a physics-based simulation framework and data acquired during outdoor experimental campaigns. The trigger maintains high detection efficiency for 10 cm-class targets up to 30–40 km distance and reliably detects real satellite tracks with signal levels as low as 1% above background. These results validate the feasibility of on-board real-time debris detection using embedded AI, and demonstrate the robustness of the algorithm under realistic operational conditions. The study was conducted in the context of a broader technology demonstration project, called DISCARD, aimed at increasing space situational awareness capabilities on small platforms.

This work describes the development of the Multi-channel Integrated Zone-sampling Analogue-memory based Readout (MIZAR) ASIC. This 64-channel chip was designed as part of NASA’s POEMMA Balloon with RADIO (PBR) mission, which aims to detect Ultra-High-Energy Cosmic Rays (UHECRs) and $\tau$ showers produced by the interaction of Cosmic Neutrinos (CNs) in the crust. The ASIC was implemented to read out a tile of 8 × 8 Silicon Photomultipliers (SiPMs) used to acquire the optical Cherenkov signals generated by Extensive Air Showers (EASs). A channel is partitioned into 256 cells where each one integrates an analogue memory, a Wilkinson Analog-to-Digital Converter (ADC) and a digital memory operating at the nominal sampling rate of 200 MS/s (with a 5 ns integration time). The signal is digitized on-chip, then the converted data is read out by an FPGA. The MIZAR also provides a 64-bit hitmap as a first-level trigger which can be elaborated by an external firmware. This ASIC can also be configured to further segment the channels into units of 32 or 64 cells each and the ADC resolution can be set to a range between 8 and 12 bits. The chip was designed in a commercial 65 nm CMOS technology node and it was submitted for production in December 2024. The ASICs were delivered in March 2025.

The detection of faint, fast-moving objects such as space debris, in optical data is a major challenge due to their low signal-to-background ratio and short visibility time. This work addresses this issue by implementing the Stack-CNN algorithm, originally designed for offline analysis, on an FPGA-based platform to enable real-time triggering capabilities in constrained space hardware environments. The Stack-CNN combines a stacking method to enhance the signal-to-noise ratio of moving objects across multiple frames with a lightweight convolutional neural network optimized for embedded inference. The FPGA implementation was developed using a Xilinx Zynq Ultrascale+ platform and achieves low-latency, power-efficient inference compatible with CubeSat systems. Performance was evaluated using both a physics-based simulation framework and data acquired during outdoor experimental campaigns. The trigger maintains high detection efficiency for 10 cm-class targets up to 30-40 km distance and reliably detects real satellite tracks with signal levels as low as 1% above background. These results validate the feasibility of on-board real-time debris detection using embedded AI, and demonstrate the robustness of the algorithm under realistic operational conditions. The study was conducted in the context of a broader technology demonstration project, called DISCARD, aimed at increasing space situational awareness capabilities on small platforms.

This work presents the implementation and the preliminary tests of the Multi-channel Integrated Zone-sampling Analogue-memory based Readout (MIZAR) ASIC. Developed using commercial 65 nm CMOS technology, the MIZAR ASIC is designed as part of the Cherenkov camera for the POEMMA Balloon with Radio (PBR) mission. The goal of the Cherenkov camera is to detect direct Cherenkov signals produced by Extensive Air Showers (EASs) pointing towards the detector. The broader objective of the PBR mission is the detection of Ultra-High Energy Cosmic Rays (UHECRs) and tau-induced air showers resulting from the interaction of Cosmic Neutrinos with the Earth's crust. In the MIZAR ASIC, a single channel is segmented into 256 acquisition cells and each one includes a capacitor, a Wilkinson Analog-to-Digital Converter (ADC) and a digital memory. This full waveform sampling system operates with an integration time of 5 ns and the data are converted on chip at the same frequency. MIZAR is designed to send out a 64-bit hitmap to use as first-level trigger to recognize patterns of interest. Each channel can be programmed to reduce the sampling window to 32 or 64 cells and the resolution can be set within the interval 8–12 bits. MIZAR was delivered in March 2025 and it has undergone laboratory testing in recent months.