One of the appealing cases of the neuromorphic research area is the implementation of biological neural networks. The current study offers Multiplierless Hodgkin-Huxley Model (MHHM). This modified model may reproduce various spiking behaviors, like the biological HH neurons, with high accuracy. The presented modified model, in comparison to the original HH model, due to its exact similarity to the original model, has more top performances in the case of FPGA saving and more achievable frequency (speed-up). In this approach, the proposed model has a 69 % saving in FPGA resources and also the maximum frequency of 85 MHz that is more than other similar works. In this modification, all spiking behaviors of the original model have been generated with low error calculations. To validate the MHHM neuron, this proposed model has been implemented on digital hardware FPGA. This approach demonstrates that the original HH model and the proposed model have high similarity in terms of higher performance and digital hardware cost reduction.

The human brain is composed of 1011 neurons with a switching speed of about 1 ms. Studying spiking neural networks, including modeling, simulation and implementation of biological neuron models help to learn about the brain and related diseases or to design more efficient bio-mimic processors and smarter robots. Such applications have made this part of neuromorphic researches very popular. In this paper, Wilson neuron model has been implemented as an approximation of Hodgkin-Huxley biological model that is adjusted for efficient digital realization on the platforms. Results show that the proposed model can adequately reproduce neuron dynamical behaviors. Hardware implementation on FPGA shows that our modifications on Wilson original model imitate the biological behavior of neurons, besides using feasibility, targeting a low-cost and high efficiency. The modifications raised a 15% speed-up compared with the original model. The mean NRMSE, RMSE and the MAE parameters are 6.43, 0.44 and 0.31, respectively.

In this paper, an ultra-compact size microstrip Wilkinson Power Divider (WPD) has been proposed with nth harmonic suppression. Two symmetrical lowpass filters have been applied to suppress third to 11th harmonics. These cells are replaced by quarter-wavelength transmission lines to achieve desired harmonic suppression. The central frequency of the PD is located in 2.5 GHz, and the physical size is only 9.4×7.2= 67 mm², which is normalized as 0.06 λg *0.08 λg. The applied lowpass filter has analyzed and then, the proposed PD presented with the insertion loss of less than 0.6 dB and return loss of 35 dB. The measured S-parameters showed a good adaption with the simulated results.

Ultra-wideband (UWB) applications require low-power and low-noise amplifiers (LNAs) that can operate over a wide frequency range. However, conventional LNAs often suffer from poor linearity and high-power consumption. This research work proposes a novel LNA design that uses the adjusted derivative superposition (DS) technique and feedback to improve the linearity and reduce the power consumption of UWB LNAs. The DS technique enhances the third-order intermodulation (IM3) cancellation by adjusting the bias currents of the transistors, whereas the feedback improves the stability and input matching of the LNA. The LNA is implemented using a degenerated common source topology in a 180 nm standard CMOS technology. The simulation results show that the LNA achieves a power gain of 10–12.2 dB, an input third-order intercept point (IIP3) of about 12 dBm, and a noise figure of less than 2.5 dB over the UWB frequency band of 3.1–10.6 GHz. The input reflection coefficient is less than -10 dB, and the power consumption is 11.6 mW with a 1.5 V power supply. The designed LNA offers a novel and innovative solution for UWB applications that significantly improve the performance and efficiency of UWB LNAs whereas reducing the cost and complexity of implementation.