Improving detection accuracy is a challenging task when detecting defects in PCBs. To conquer the issue of degradation of recognition performance of existing intelligent detection algorithms in different environments, we present an improved algorithm, IEMA-YOLOv8, based on YOLOv8. First, we design a novel Efficient Multi-Scale Attention (EMA) combined with the Inverted Residual Mobile Block (IRMB) to form a new attention mechanism called IEMA. The IEMA module is subsequently incorporated into the C2f module to boost the model’s overall performance. Secondly, the Spatial Pyramid Pooling Enhanced with ELAN (SPPELAN) module is employed to improve the original Spatial Pyramid Pooling Fast (SPPF) module, thereby bolstering the model’s capacity to recognize defective regions. Finally, the More Focused Intersection over Union (Focaler-IoU) loss function replaces the original Complete Intersection over Union (CIoU) loss function, aiming to compensate for the limitations of the current bounding box regression methodology, thus further enhancing the efficacy of detection in the task. The experimental results show that our proposed IEMA-YOLOv8 algorithm has precision, recall, mAP50, and mAP50:95 values of 88.8%, 96.8%, 94.6%, and 51%, respectively, provided that the model complexity is kept basically the same and the Frames Per Second (FPS) value reaches 116.2. These values are 1.1%, 3.6%, 4.9%, and 6% higher than the originalYOLOv8n algorithm. Compared with theYOLO family of one-stage detection models, our proposed algorithm has significant advantages in defect detection.

With the development of the semiconductor manufacturing process towards miniaturization and high integration, the detection of microscopic defects on wafer surfaces faces the challenge of balancing precision and efficiency. Therefore, this study proposes a lightweight inspection model based on the YOLOv8 framework, aiming to achieve an optimal balance between inspection accuracy, model complexity, and inference speed. First, we design a novel lightweight module called IRB-GhostConv-C2f (IGC) to replace the C2f module in the backbone, thereby significantly minimizing redundant feature computations. Second, a CNN-based cross-scale feature fusion neck network, the CCFF-ISC neck, is proposed to reduce the redundant computation of low-level features and enhance the expression of multi-scale semantic information. Meanwhile, the novel IRB-SCSA-C2f (ISC) module replaces the C2f in the neck to further improve the efficiency of feature fusion. In addition, a novel dynamic head network, DyHeadv3, is integrated into the head structure, aiming to improve the small-scale target detection performance by dynamically adjusting the feature interaction mechanism. Finally, so as to comprehensively assess the proposed algorithm’s performance, an industrial dataset of wafer defects, WSDD, is constructed, which covers “broken edges”, “scratches”, “oil pollution”, and “minor defects”. The experimental results demonstrate that the CISC-YOLO model attains an mAP50 of 93.7%, and the parameter amount is reduced to 1.92 M, outperforming other mainstream leading algorithms in the field. The proposed approach provides a high-precision and low-latency real-time defect detection solution for semiconductor industry scenarios.