This paper provides a comprehensive review of the existing approaches to ensuring high-precision and reliable GNSS positioning. The purpose of this review is to examine modern approaches to mitigating the main factors affecting GNSS receiver accuracy, including atmospheric delays, ephemeris and clock errors, multipath, and receiver noise, and to highlight the key open challenges in high-precision positioning and error correction. The article presents various error correction techniques and provides their analysis. It presents modern architectural solutions for GNSS receivers aimed at providing high-precision and reliable positioning (conventional, software-defined, multi-frequency and multi-constellation, cloud/edge, integrated GNSS/INS/LiDAR, and integrated GNSS/IoT) and their comparative analysis. The resulting overview will be useful for further research in the field of high-precision navigation.

This paper provides an analysis of existing single-digit binary adders from the point of view of their implementation on fans built based on metal-oxide-semiconductor field-effect transistor—MOSFETs. The synthesis of a single-digit adder with a conditional sum is carried out. The considered adders are compared in terms of speed and hardware complexity (by the number of MOSFETs). Adders perform arithmetic operations on numbers. In combination with other logical operations, adders are the core of the circuits of arithmetic logic devices that implement several different operations; they are an integral part of different processors. The most important parameters of adders are their hardware complexity and performance; therefore, many options for single-bit and multi-bit connectors with serial, parallel and combined transmissions have been developed. In the final part, a scheme of a multi-bit adder with consecutive transfers on adders with a conditional sum is given. An example of performing addition operations is given.