Ma Longhua

Prof. Ma Longhua


Research Focus & Metrics

Academic Career Length

9Years (2018-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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30 January 2018 in International Journal of Control
Verified
Journal Article
Closed access
MHMiao Huang
Miao Huang
XWXin Wang
Xin Wang
ZLZheming Lu
Zheming Lu
MLMa Longhua
Ma Longhua
HSHongye Su
Hongye Su
LWLang Wang
Lang Wang
This study introduces an improved multiple model adaptive control (MMAC) algorithm for a class of nonlinear discrete-time systems. The controller consists of a linear direct adaptive controller, a neural network-based nonlinear direct adaptive controller and a switching mechanism. The assumption of the nonlinear term is relaxed by incorporating a parameter estimator with an augmented error. The control direction of the system is not required to be known by employing a linear direct adaptive controller with the discrete Nussbaum gain and future output predictions. The stability of the closed-loop systems applying the proposed MMAC method is proved and the improved transient performance of the system is illustrated by the simulation results.

1 January 2019 in International Journal of Information and Education Technology
Verified
Journal Article
Open access
ZZZhihuan Zhang
Zhihuan Zhang
ZLZhe-Ming Lu
Zhe-Ming Lu
MLMa Longhua
Ma Longhua
CHChao Hu
Chao Hu

1 April 2021 in Journal of Nanoelectronics and Optoelectronics
Verified
Journal Article
Closed access
XZXianghong Zhao
Xianghong Zhao
MLMa Longhua
Ma Longhua
HSHongye Su
Hongye Su
JZJieyu Zhao
Jieyu Zhao
WCWeiming Cai
Weiming Cai
In this paper, a simple-structured and high-performance current-mode logic (CML) ternary D flip-flop based on BiCMOS is proposed. It combines both advantages of BiCMOS and CML circuits, which is with much more high-speed, strong-drive and anti-interference abilities. Utilizing TSMC 180 nm process, results of simulations carried out by HSPICE illustrate the proposed circuit not only has correct logic function, but also gains improvements of 95.6~98.4% in average D-Q delay and 16.2%~70.4 in PDP compared with advanced ternary D flip-flop. When compared at the same information transmission speed, proposed circuit is more competitive. Furthermore, it can perform up to high frequency of 15 GHz and drive heavier load. All the results prove that proposed circuit is high-performance and very suitable for high-speed and high-frequency applications.