Yihao Chen

Dr. Yihao Chen


Research Focus & Metrics

Academic Career Length

3Years (2024-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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25 June 2025 in IEICE Electronics Express
Verified
Journal Article
Open access
PDF file
TLTianhang Liang
Tianhang Liang
XLXiangrui Li
Xiangrui Li
ZLZhigang Li
Zhigang Li
HLHaoyu Li
Haoyu Li
GCGang Chen
Gang Chen
HLHuaxiang Lu
Huaxiang Lu
With the widespread use of analogue circuits, current reference (CR) trimming has become an increasingly important issue. Therefore, finding a reliable and area-efficient trimming method becomes more and more critical. In this paper, a novel area-efficient memristor-based trimming circuit for current reference (CR) with temperature coefficient optimization capability is proposed. The proposed trimming core circuit uses only the source-degraded current mirror embedded in the memristors, thus achieving a significant area reduction.The circuit produces an output of approximately 5.2 μA, and test results show a calibrated output temperature coefficient (TC) of less than 75 ppm/°C over the temperature range of -20°C to 120°C, with a linearity of 4.3% /V over 2.2 to 4 V. The circuit implementation uses 0.18-μm CMOS technology. The layout area is less than 0.0016 mm2, representing average area savings of 84.3% over the current state of the art in trimming circuits.

1 December 2024 in Applied Sciences
Verified
Journal Article
Open access
PDF file
PFPengcheng Feng
Pengcheng Feng
YCYihao Chen
Yihao Chen
JYJinke Yu
Jinke Yu
HYHao Yue
Hao Yue
ZJZhelong Jiang
Zhelong Jiang
GCGang Chen
Gang Chen
Large Language Models (LLMs), based on transformer architecture, have demonstrated remarkable capabilities in natural language processing tasks, enabling machines to generate human-like text and engage in meaningful dialogues. However, the exponential increase in model parameters has led to limitations in inference speed and energy efficiency. Compute-in-memory (CIM) technology offers a promising solution to accelerate AI inference by performing analog computations directly within memory, potentially reducing latency and power consumption. At the same time, CIM has been successfully applied to accelerate Convolutional Neural Networks (CNNs); however, the matrix–matrix multiplication (MatMul) operations inherent in the scaled dot-product attention of the transformer present unique challenges for direct CIM implementation. In this work, we propose InMemQK, a compute-in-memory-based attention accelerator that focuses on optimizing MatMul operations through software and hardware co-design. At the software level, InMemQK employs product quantization (PQ) to eliminate data dependencies. At the hardware level, InMemQK integrates energy-efficient time-domain MAC macros for ADC-free computations. Experimental results show InMemQK achieves 13.2×–13.9× lower power consumption than existing CIM-based accelerators.