Approximate computing studies the quality-efficiency trade-off to attain a best-efficiency (e.g., area, latency, and power) design for a given quality constraint and vice versa. Recently, self-healing methodologies for approximate computing have emerged that showed an effective quality-efficiency trade-off as compared to the conventional error-restricted approximate computing methodologies. However, state-of-the-art self-healing methodologies are constrained to highly parallel implementations with similar modules (or parts of a datapath) in multiples of two and for square-accumulate functions through the pairing of mirror versions to achieve error cancellation. In this article, we propose a novel methodology for Internal-Self-Healing (ISH) that allows exploiting self-healing within a computing element internally without requiring a paired, parallel module, which extends the applicability to irregular/asymmetric datapaths while relieving the restriction of multiples of two for modules in a given datapath, as well as going beyond square functions. We employ our ISH methodology to design an approximate multiply-accumulate (xMAC), wherein the multiplier is regarded as an approximation stage and the accumulator as a healing stage. We propose to approximate a recursive multiplier in such a way that a near-to-zero average error is achieved for a given input distribution to cancel out the error at an accurate accumulation stage. To increase the efficacy of such a multiplier, we propose a novel 2×2 approximate multiplier design that alleviates the overflow problem within an n×n approximate recursive multiplier. The proposed ISH methodology shows a more effective quality-efficiency trade-off for an xMAC as compared to the conventional error-restricted methodologies for random inputs and for radio-astronomy calibration processing (up to 55% better quality output for equivalent-efficiency designs).

Approximate computing strives to achieve the highest performance-, area-, and power-efficiency for a given quality constraint and vice versa. Conventional approximate design methodology restricts the introduction of errors to avoid a high loss in quality. However, this limits the computing efficiency and the number of pareto-optimal design alternatives for a quality-efficiency tradeoff. This paper presents a novel self-healing (SH) methodology for an approximate square-accumulate (SAC) architecture. SAC refers to a hardware architecture that computes the inner product of a vector with itself. SH exploits the algorithmic error resilience of the SAC structure to ensure an effective quality-efficiency tradeoff, wherein the squarer is regarded as an approximation stage, and the accumulator as a healing stage. We propose to deploy an approximate squarer mirror pair , such that the error introduced by one approximate squarer mirrors the error introduced by the other, i.e., the errors generated by the approximate squarers are approximately the additive inverse of each other. This helps the healing stage (accumulator) to automatically average out the error originated in the approximation stage, and thereby to minimize the quality loss. For random input vectors, SH demonstrates up to 25% and 18.6% better area and power efficiency, respectively, with a better quality output than the conventional approximate computing methodology. As a case study, SH is applied to one of the computationally expensive components (SAC) of the radio astronomy calibration application, where it shows up to 46.7% better quality for equivalent computing efficiency as that of conventional methodology.

Revolutionary advances in technology have been seen in many industries, with the IIoT being a prime example. The IIoT creates a network of interconnected devices, allowing smooth communication and interoperability in industrial settings. This not only boosts efficiency, productivity, and safety but also provides transformative solutions for various sectors. This research looks into open-source IIoT and edge platforms that are applicable to a range of applications with the aim of finding and developing high-potential solutions. It highlights the effect of open-source IIoT and edge computing platforms on traditional IIoT applications, showing how these platforms make development and deployment processes easier. Popular open-source IIoT platforms include DeviceHive and Thingsboard, while EdgeX Foundry is a key platform for edge computing, allowing IIoT applications to be deployed closer to data sources, thus reducing latency and conserving bandwidth. This study seeks to identify potential future domains for the implementation of IIoT solutions using these open-source platforms. Additionally, each sector is evaluated based on various criteria, such as development requirement analyses, market demand projections, the examination of leading companies and emerging startups in each domain, and the application of the International Patent Classification (IPC) scheme for in-depth sector analysis.

The evolution of Deep Learning (DL) algorithms, coupled with the availability of vast amounts of data, has enabled superior accuracy across multiple Artificial Intelligence (AI) tasks. However, such accuracy incurs substantial computational and energy costs, limiting deployment on resource-constrained embedded devices. Approximate Computing has emerged as a promising paradigm to mitigate this challenge by trading off tolerable accuracy loss for significant gains in energy, power, area, and performance. Leveraging the inherent error resilience of DL models, approximation techniques have been extensively explored at multiple layers of the DL computing stack, and several surveys also exist. However, to the best of our knowledge, no prior Systematic Literature Review (SLR) exists that is specifically focused on Approximate Computing for DL in Embedded Systems. This article presents SLR by selecting 51 studies published between January 2019 and May 2025. These studies are organized into four categories corresponding to layers of the DL computing stack, including cross-layer approximations. Furthermore, 12 approximation techniques, 11 benchmark datasets, 26 prominent DL architectures, and three embedded platforms for the energy-efficient DL deployment are summarized, along with the leading tools, frameworks, and optimization/ evaluation metrics. Additionally, the academic and industry-wide global adoption has also been highlighted. This SLR reveals that Approximate Multipliers, CIFAR-10 and MNIST datasets, ResNet-50 and LeNet models, and ASIC-based 45 nm technology designs are most frequently targeted, whereas Synopsys DC, PyTorch, and Verilog emerged as the predominant tools and frameworks supporting approximations in DL. Finally, this SLR highlights the current challenges, research gaps, and introduces a conceptual cross-layer approximate DL framework to address them. The findings of this SLR offer a comprehensive reference for the researchers and practitioners to select suitable approximation techniques along with the underlying tools and hardware platforms, aligned with their application requirements.

Large scale Radio Telescopes for Radio Astronomy highly depend on the availability of large (digital) processing capacities for imaging. Estimates concerning power efficiency for future Radio Telescopes lead to anticipated power consumption numbers beyond feasibility. To reduce the power budget, the use of approximate multipliers within the correlator is explored. A baseband equivalent executable model of a radio synthesis telescope is constructed to assess the effects of approximate multipliers. Besides ideal multipliers with floating point accuracy, the use of accurate 8-bit multipliers and 4 different types of approximate multipliers is explored. For each of these multipliers, the energy efficiency of an individual multiplier is known and used to determine the energy efficiency improvement of a correlator when using approximate multipliers. The effects of approximation are quantified by 3 metrics (Signal-to-Noise-Ratio (SNR), Spurious-Free-Dynamic-Range (SFDR) and Root-Mean-Square (RMS) level) derived from maps constructed by the executable model based on an empty sky with only a single point source. This is considered to be the worst case scenario. For illustration purposes, a more realistic input is processed by the model as well. The metrics have been determined based on different SNR levels at the input of each antenna element. For input SNR levels up to 10 dB, all types of approximate multipliers used in this paper can be exploited to improve energy efficiency of correlators, leading to a maximum energy reduction of 19 %. For input SNR values up to 30 dB an energy improvement up to 12 % can be achieved. These percentages are based on implementations in a 40nm low power IC technology at 1 GHz.

Approximate Computing has emerged as a viable solution to resource-efficient computing in error-resilient applications by relaxing constraints on accuracy for significant gains in terms of power, performance, and area. Among existing approximation techniques, the self-healing methodologies have shown a promising quality-efficiency balance by canceling out the overall effect of computational errors. However, they rely on highly parallel implementations for error cancellation. In our prior work (MACISH), we proposed an Internal-Self-Healing (ISH) methodology that applies approximations in the recursive multiplication stage and leverages the accumulation stage for error cancellation, eliminating the need for paired parallel modules required by traditional self-healing approaches. ASIC-based digital designs proposed by MACISH demonstrated superior quality-efficiency results for the radio astronomy application. However, the architectural differences limit the direct mapping of ASIC-based optimized designs to FPGAs. Therefore, this article addresses the gap by designing the FPGA-based Pareto-optimal 4-bit and 8-bit recursive approximate multipliers using ISH methodology. The proposed Design Space Exploration (DSE) strategy manages the vast 8-bit design space by deriving the candidate designs from 4-bit Pareto-optimal multipliers, reducing the search complexity while preserving the performance. The proposed designs achieve up to 12% and 33.6% better power and energy efficiency, respectively, compared to accurate 8-bit multipliers and up to 30× improved output quality at a similar area. The design flow is automated using the ’Approxy’ Tool, which has also been developed as part of this work. For the radio astronomy correlation application, these designs achieved comparable (and acceptable) output quality with respect to the state-of-the-art. For Deep Learning (DL) workloads, the proposed 8-bit designs matched or even exceeded the baseline accuracy for binary and multiclass classification problems.