Vertical-cavity surface-emitting lasers (VCSELs) are an attractive choice for short-range optical interconnects (OIs) in datacom applications. As the limited bandwidth of VCSEL is the major obstacle to achieve higher data rates in these optical systems, significant effort has been made to develop efficient VCSEL drivers to increase data rate while consuming less power. We review the current state of the art in VCSEL driver design, including choices of semiconductor technology, modulation format, VCSEL configuration, and pre-emphasis techniques, with an emphasis on the challenges associated with VCSEL bandwidth limitations, nonlinearities, and thermal behavior. We illustrate the choices with simulations using a physics-based VCSEL model.

A wideband Cartesian in-phase and quadrature (I/Q) modulator based on dual 10 b RF-digital-to-analog converters (DACs) is presented. Nonoverlapping local oscillator (LO) signals and a segmented nonlinear scaling with scaled unit cells contribute to a high linearity and allow for a low-complexity digital predistortion (DPD). Unit-cell flip-flops (FFs) and a balanced clock distribution enable a high sample rate with little skew. Out-of-band emissions are reduced through drive-slope control of the data-switch inputs. The modulator, implemented in the 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS, operates between 20 and 26 GHz with a peak sample rate of 11 GS/s. It has been used to demonstrate the transmission of a 64-quadrature amplitude modulation (QAM) single-carrier (SC) signal at 13.2 Gb/s, a 256-QAM SC signal at 7.33 Gb/s, and an orthogonal frequency division multiplexing (OFDM) signal comprising four aggregated 400-MHz 64-QAM channels with an error vector magnitude (EVM) of 6.43%. These results demonstrate the potential of the proposed modulator for the realization of ultrawideband transmitters in high-performance millimeter-wave (mmW) systems.

We describe a 2×6 bit Cartesian RF in-phase and quadrature (IQ)-modulator, implemented on 0.15 mm ² in 22-mm fully-depleted silicon-on-insulator (FDSOI) CMOS technology. Measurements show a 3-dB bandwidth of 17-24-GHz and saturated output power of 10.4 dBm with a peak drain efficiency of 15.6%. The IQ-modulator has been verified up to 8 GS/s. To the best of our knowledge, this is the highest-frequency CMOS RF IQ-modulator using sub-50%-duty-cycle local oscillator (LO) signals, and the highest sample rate reported for >3 bit fully integrated Cartesian IQ-modulators.

We present a systematic way of performing sensitivity analysis on on-chip power distribution grids. By using factor analysis we are able to uncover correlations between power grid design variables and power supply noise. From our analysis of 300 different grids in a 65-nm process, we can identify which power grid design variables have both high correlation to and high impact on noise; the most important one being supply rail width.

We present a Cartesian I/Q modulator based on dual 10-bit RF-DACs. Non-overlapping LO signals and a segmented RF - DAC architecture with scaled bit currents contribute to good linearity and allow low-complexity DPD. Unit-cell flip-flops with a balanced clock distribution enable a high sample rate. Drive slope control for data switches reduce out-of-band emissions. Implemented in 22 nm FDSOI CMOS, the modulator operates up to 26 GHz with a maximum sample rate of 11 GS/s. The modulator is used to demonstrate transmission of a 64QAM signal at 13.2 Gb/s, a 256QAM signal at 7.33 Gb/s, and an OFDM signal comprising four aggregated 400-MHz 64QAM channels at an EVM of 6.43 %. The results demonstrate the potential of the proposed modulator architecture for realization of ultra wideband transmitters for high performance mm-wave systems.

We implement a 56-Gbps BCH encoder in a 130-nm SiGe technology suitable for VCSEL drivers for short-reach optical communication. We show that encoder-driver integration can reduce total power consumption in addition to reducing manufacturing cost.