Limin Xiao

Dr. Limin Xiao


Research Focus & Metrics

Academic Career Length

17Years (2010-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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10 May 2023 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verified
Journal Article
Closed access
MHMeng Han
Meng Han
LWLiang Wang
Liang Wang
LXLimin Xiao
Limin Xiao
HZHao Zhang
Hao Zhang
CZChenhao Zhang
Chenhao Zhang
JZJianfeng Zhu
Jianfeng Zhu
Point clouds have been employed extensively in machine perception applications. Farthest point sampling (FPS) is a critical kernel for point cloud processing. With the rapid growth of point cloud scale, FPS introduces a large number of memory accesses, which become the bottleneck of the large-scale point cloud processing. In this paper, we present QuickFPS, an architecture and algorithm co-design of farthest point sampling in large-scale point clouds. First, We systemically analyze the characteristics of FPS and put forward a bucket-based farthest point sampling algorithm. The algorithm introduces a two-level tree data structure to organize the large-scale point cloud into multiple buckets. By using two mechanisms named merged computation and implicit computation for the buckets, the external memory accesses and compute cost are significantly reduced. Then, we design an efficient domain-specific accelerator for farthest point sampling in large-scale point clouds. The accelerator takes advantage of different forms of parallelism and further improves the accelerator’s efficiency. Finally, we evaluate QuickFPS with several widely used point cloud datasets, which include small-scale and large-scale point clouds (up to 120,000 points). Overall, QuickFPS achieves performance speedups of 43.4x and 12.2x compared to GTX 1080Ti GPU and state-of-the-art point cloud accelerator PointAcc, respectively.

3 October 2020 in Electronics
Verified
Journal Article
Open access
PDF file
FWFei Wu
Fei Wu
WYWenxue Yang
Wenxue Yang
LXLimin Xiao
Limin Xiao
JZJinbin Zhu
Jinbin Zhu
Deep neural network has been widely used in pattern recognition and speech processing, but its vulnerability to adversarial attacks also proverbially demonstrated. These attacks perform unstructured pixel-wise perturbation to fool the classifier, which does not affect the human visual system. The role of adversarial examples in the information security field has received increased attention across a number of disciplines in recent years. An alternative approach is “like cures like”. In this paper, we propose to utilize common noise and adaptive wiener filtering to mitigate the perturbation. Our method includes two operations: noise addition, which adds natural noise to input adversarial examples, and adaptive wiener filtering, which denoising the images in the previous step. Based on the study of the distribution of attacks, adding natural noise has an impact on adversarial examples to a certain extent and then they can be removed through adaptive wiener filter, which is an optimal estimator for the local variance of the image. The proposed improved adaptive wiener filter can automatically select the optimal window size between the given multiple alternative windows based on the features of different images. Based on lots of experiments, the result demonstrates that the proposed method is capable of defending against adversarial attacks, such as FGSM (Fast Gradient Sign Method), C&W, Deepfool, and JSMA (Jacobian-based Saliency Map Attack). By compared experiments, our method outperforms or is comparable to state-of-the-art methods.

17 March 2022 in IEEE Transactions on Cloud Computing
Verified
Journal Article
Closed access
LRLi Ruan
Li Ruan
YBYu Bai
Yu Bai
SLShaoning Li
Shaoning Li
JLJiaxun Lv
Jiaxun Lv
TZTianyuan Zhang
Tianyuan Zhang
YXYunzhi Xue
Yunzhi Xue
Cloud workload turning point is either a local peak point standing for workload pressure or a local valley point standing for resource waste. Predicting such critical points is important to give warnings to system managers to take precautionary measures aimed at achieving high resource utilization, quality of service (QoS), and profit of the investment. Existing researches mainly focus on point value prediction only, whereas trend-based turning point prediction is not considered. This is partly due to the fact that traditional trend prediction methods have a weak ability to represent the cloud features, which means that they cannot describe the highly-variable cloud workloads time series. This paper introduces a novel cloud workload turning point prediction approach based on cloud feature-enhanced deep learning. Firstly, we establish a turning point prediction model of cloud server workload by taking cloud workload features into consideration. Then, a cloud feature-enhanced deep learning model is designed for workload turning point prediction. Experiments on the most famous Google cluster demonstrate the effectiveness of our model compared with state-of-the-art models. To the best of our knowledge, this paper is the first systematic research on turning point-based trend prediction of cloud workload time series by cloud feature-enhanced deep learning.

1 October 2019 in Journal of Visual Communication and Image Representation
Verified
Journal Article
Closed access
BYBaicheng Yan
Baicheng Yan
LXLimin Xiao
Limin Xiao
HZHang Zhang
Hang Zhang
DXDaliang Xu
Daliang Xu
LRLi Ruan
Li Ruan
YZYiyang Zhang
Yiyang Zhang

9 May 2024 in IEEE Transactions on Computers
Verified
Journal Article
Closed access
MHMeng Han
Meng Han
LWLiang Wang
Liang Wang
LXLimin Xiao
Limin Xiao
TCTianhao Cai
Tianhao Cai
ZWZeyu Wang
Zeyu Wang
CZChenhao Zhang
Chenhao Zhang
The systolic accelerator is one of the premier architectural choices for DNN acceleration. However, the conventional systolic architecture suffers from low PE utilization due to the mismatch between the fixed array and diverse DNN workloads. Recent studies have proposed flexible systolic array architectures to adapt to DNN models. However, these designs support only coarse-grained reshaping or significantly increase hardware overhead. In this study, we propose ReDas, a flexible and lightweight systolic array that supports dynamic fine-grained reshaping and multiple dataflows. First, ReDas integrates lightweight and reconfigurable roundabout data paths, which achieve fine-grained reshaping using only short connections between adjacent PEs. Second, we redesign the PE microarchitecture and integrate a set of multi-mode data buffers around the array. The PE structure enables additional data bypassing and flexible data switching. Simultaneously, the multi-mode buffers facilitate fine-grained reallocation of on-chip memory resources, adapting to various dataflow requirements. ReDas can dynamically reconfigure to up to 129 different logical shapes and 3 dataflows for a 128 × 128 array. Finally, we propose an efficient mapper to generate appropriate configurations for each layer of DNN workloads. Compared to the conventional systolic array, ReDas can achieve about 4.6× speedup and 8.3× energy-delay product (EDP) reduction.

9 February 2022 in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verified
Journal Article
Closed access
YZYuhao Zhou
Yuhao Zhou
HZHe Zhenxue
He Zhenxue
CCChen Chen
Chen Chen
TWTao Wang
Tao Wang
LXLimin Xiao
Limin Xiao
XWXiang Wang
Xiang Wang
With the emergence of the multicore architecture and the increase of chip operating frequency, power optimization has become a key step of circuit logic synthesis. Aiming at the XNOR/OR circuits, with the goal of minimizing power, construct the optimal polarity fixed-polarity Reed–Muller (FPRM) circuits power optimization scheme. However, the power optimization for FPRM circuits is a multipeak combinatorial optimization problem, we first propose a metaheuristic optimization algorithm (MOA), which includes the global exploration optimizer, local deep exploitation optimizer, and initial population and uses the proposed differential evolution optimization, fierce wolf siege algorithm-based tabu search, and improved skew tent map to make the population evolve. Based on the proposed Huffman tree construction algorithm and MOA, we propose an efficient power optimization approach (EPOA) to find the minimum power FPRM circuit. Experimental results on the benchmark circuits confirm the effectiveness of EPOA.