This article presents a wideband balanced variable-gain low-noise amplifier (VG-LNA) implemented in a 55-nm CMOS process. The proposed LNA has two cascode stages with an interstage matching transformer to constitute a fourth-order magnetically coupled resonator with two resonant peaks. The frequency-selective gain equalization technique is proposed to compensate for the gain variation of interstage dual-resonant tanks. This VG-LNA leverages a current-steering technique to realize a phase-invariant 18-dB tunable gain range with a measured input 1-dB gain compression point (IP1 dB) at 9 GHz from -12.2 to -5 dBm. The LNA achieves a power gain of 20.2 dB with ±0.5-dB gain variation and a noise figure (NF) of 3.26 dB from 6.5 to 12 GHz. Due to the lumped Lange couplers, the input and output matching are both better than -14 dB. This chip occupies 1.44 x 0.68 mm² area excluding pads and consumes 75 mW.

Constant false alarm rate (CFAR) detection algorithms, which are widely used in frequency-modulated continuous wave (FMCW) radar systems, achieve target detection by employing a threshold determined on the basis of a predicted background level. However, in multitarget scenarios, the multitarget shadowing effect can lead to inaccurate prediction of the background level and improper setting of the threshold, which then results in severely degraded CFAR performance. To combat this multitarget shadowing effect, a novel CFAR algorithm based on sparsity adaptive correlation maximization (SACM-CFAR) is proposed in this work. The proposed SACM-CFAR algorithm realizes target detection by utilizing the correlation between linear measurements of the radar intermediate frequency (IF) signal and the sensing matrix. To achieve a desired false alarm rate, the proposed algorithm determines the threshold by estimating the distributed parameters of the reduced sample set obtained by removing the detected targets from the original sample set. Both simulation results and field test results verify that the proposed algorithm outperforms conventional algorithms in multitarget scenarios.

Estimating ocean wave height is vital for coastal activities. Herein, we propose a method for the estimation of wave height using a phase time series of the frequency-modulated continuous-wave (FMCW) millimeter-wave (MMW) radar. We simulated a one-dimensional wavy ocean surface under different wind speeds and the electromagnetic echo of MMW radar on the ocean surface. The simulation results show that the unwrapping phase time series-based wave heights are highly consistent with the actual wave heights. This shows that the phase time series of the FMCW MMW radar is effective for estimating wave height, and the FMCW MMW radar can be used to monitor ocean states.

In conventional fast-ramp based target detection schemes for the frequency modulated continuous wave (FMCW) radar systems, all chirp sequences are performed fully on two-dimensional fast Fourier transforms (FFTs) to estimate range and velocity of a target, and all range-Doppler cells are scanned by the two-dimensional (2D) cell-averaging constant false alarm rate (CA-CFAR) detector to extract valid targets against background noise. This results in an extremely high computational complexity. To decrease the complexity while maintaining a desired performance, this paper proposes a target detection scheme based on distributed one-dimensional (1D) CA-CFAR and region of interest (ROI) pre-processing, which performs Doppler-FFT only for range ROI cells and scans only Doppler ROI cells to extract pre-targets. Simulation results indicate that the proposed scheme significantly decreases complexity and simultaneously improves detection performance in terms of detection probability, figure of merit (FoM) and CFAR loss, as compared to the conventional schemes. The advantages of the proposed scheme over the conventional ones are further verified by field tests under multi-target scenario, using our recently developed FMCW radar with high angular resolution.

This article presents a four-element 7.5-9-GHz phased-array receiver with 1-8 concurrent beams in a 65-nm CMOS technology. Each output beam utilizes all the input elements to maximize the beamforming gain. To realize a low-power and compact design, the multielement multibeam phased-array architecture features the gm-based variable-gain phase shifter (VG-PS) and the current-sharing active combiner. The VG-PS with 6-bit phase resolution achieves <; 2° root mean square (rms) phase error and <; 0.3 dB rms gain error at the maximum gain setting. The receiver demonstrates a 20-dB power gain, a 3.6-dB noise figure (NF), and a -19-dBm input 1-dB gain compression point (IP1dB) at 7.5-9 GHz for each element. The chip occupies $5.42\times3.62$ mm ² area excluding pads and consumes 860 mW, equivalent to the record low 27 mW per element per beam. To our knowledge, the receiver achieves the maximum number of simultaneously reconfigurable beams with the lowest power consumption per element per beam in RF phase shifting and combining receiver chips.

This article presents a 7-bit wideband passive attenuator with low insertion loss (IL) and high attenuation accuracy in 55-nm CMOS technology. The π-type and bridge-T-type attenuation units utilize an effective capacitive compensation technique, whose bandwidth extension mechanism is detailed in a single-unit pole-zero analysis. The matching-induced performance deterioration is investigated to minimize amplitude and phase errors at the chip level. The fabricated attenuator demonstrates a 32.4-dB attenuation range with a 0.255-dB resolution and a 3.5-8.4-dB IL from dc to 32 GHz. The measured root-mean-square (rms) amplitude and phase errors are below 0.32 dB and 5.33°, respectively. The attenuator occupies a 0.054-mm ² core area and consumes negligible power.