A quantum instruction set is where quantum hardware and software meet. We develop characterization and compilation techniques for non-Clifford gates to accurately evaluate its designs. Applying these techniques to our fluxonium processor, we show that replacing the iSWAP gate by its square root SQiSW leads to a significant performance boost at almost no cost. More precisely, on SQiSW we measure a gate fidelity of up to 99.72% and averaging at 99.31%, and realize Haar random two-qubit gates with an average fidelity of 96.38%. This is an average error reduction of 41% for the former and a 50% reduction for the latter compared to using iSWAP on the same processor.
The interplay between dimensionality and anisotropicity leads to intriguing optoelectronic properties and exciton dynamics in low dimensional semiconductors. In this study we use nanostructured phosphorene as a prototypical example to unfold such complex physics and develop a general first-principles framework to study exciton dynamics in low dimensional systems. Specifically we derived the radiative lifetime and light emission intensity from 2D to 0D systems based on many body perturbation theory, and investigated the dimensionality and anisotropicity effects on radiative recombination lifetime both at 0 K and finite temperature, as well as polarization and angle dependence of emitted light. We show that the radiative lifetime at 0 K increases by an order of 103 with the lowering of one dimension (i.e. from 2D to 1D nanoribbons or from 1D to 0D quantum dots). We also show that obtaining the radiative lifetime at finite temperature requires accurate exciton dispersion beyond the effective mass approximation. Finally, we demonstrate that monolayer phosphorene and its nanostructures always emit linearly polarized light consistent with experimental observations, different from in-plane isotropic 2D materials like MoS2 and h-BN that can emit light with arbitrary polarization, which may have important implications for quantum information applications.
Fluxonium qubits are recognized for their high coherence times and high operation fidelities. These are attributed to their unique design incorporating a superinductor, which is typically implemented using an array of over 100 Josephson junctions; however, this complexity poses significant fabrication challenges, particularly in achieving high yield and junction uniformity with traditional methods. Here, we introduce an overlap process for Josephson-junction fabrication that achieves nearly 100% yield and maintains uniformity across a 2-inch (50.8-mm) wafer with less than 5% variation for the phase-slip junction and less than 2% for the entire junction array. We use a compact junction array design that achieves state-of-the-art dielectric loss tangents and flux noise levels, as confirmed by multiple devices. This enables fluxonium qubits to reach energy relaxation times exceeding 1 ms at the flux-frustration point. This work paves the way for scalable, high-coherence fluxonium processors using processes compatible with complementary metal-oxide semiconductor manufacturing, marking a significant step toward practical quantum computing.
In a quantum processor, the device design and external controls together contribute to the quality of the target quantum operations. As we continuously seek better alternative qubit platforms, we explore the increasingly large device and control design space. Thus, optimization becomes more and more challenging. In this work, we demonstrate that the figure of merit reflecting a design goal can be made differentiable with respect to the device and control parameters. In addition, we can compute the gradient of the design objective efficiently in a similar manner to the back-propagation algorithm and then utilize the gradient to optimize the device and the control parameters jointly and efficiently. Therefore, our work extends the scope of the quantum optimal control to device design and provides an efficient optimization method. We also demonstrate the viability of gradient-based joint optimization over the device and control parameters through a few examples based on the superconducting qubits.
Generalized bicycle codes (GB codes) represent a promising family of quantum low-density parity-check codes, characterized by high code rates and relatively local qubit connectivity. A subclass of the GB code called bivariate bicycle codes (BB codes) has garnered significant interest due to its compatibility with two-layer connectivity architectures on superconducting quantum processors. However, one key limitation of BB codes is the high qubit connectivity degree requirements (degree 6), which exacerbates the noise susceptibility of the system. Building on the recent progress in implementing multiple two-qubit gates on a single chip, this work introduces Louvre—a routing-based framework designed to reduce qubit connectivity requirements in GB codes. Specifically, Louvre-7 achieves degree reduction while preserving the depth of the syndrome extraction circuit, whereas Louvre-8 further minimizes the connectivity by slightly increasing the circuit depth. When applied to BB codes, these two schemes could reduce the average degree to 4.5 and 4, respectively. Crucially, Louvre eliminates some of the long-range, error-prone connections, which is a distinct advantage over prior approaches. Numerical simulations demonstrate that Louvre-7 has an logical error rate indistinguishable from that of the standard syndrome extraction circuits of GB codes, while Louvre-8 only incurs a slight error rate penalty.