Chuangye Wang

Mr. Chuangye Wang

orcid

Research Focus & Metrics

Academic Career Length

2Years (2025-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

View All Publications
25 November 2025 in Micromachines
Verified
Journal Article
Open access
PDF file
YMYuchen Miao
Yuchen Miao
QYQingyu Yuan
Qingyu Yuan
CWChuangye Wang
Chuangye Wang
JCJiali Cheng
Jiali Cheng
To accurately model the nonlinear characteristics of the intrinsic capacitance of Gallium Nitride High Electron Mobility Transistors (GaN HEMTs), this paper proposes an improved nonlinear capacitance model based on the traditional Angelov model. The experiments employed GaN HEMTs fabricated by United Monolithic Semiconductors (UMS) using the GH15-10 process. These devices feature a uniform gate length of 150 nm, with gate widths designed as 2 × 10 μm, 4 × 20 μm, 6 × 30 μm, and 8 × 40 μm, respectively (gate width is calculated as “number of gate fingers × unit gate width”). In this study, two types of devices with gate widths of 2 × 10 μm and 4 × 20 μm were selected to extract intrinsic capacitance parameters, which were then substituted into the traditional Angelov model and the proposed improved model, respectively. By comparing the coefficient of determination (R2) and Root Mean Square Error (RMSE) of the two models, it is found that the improved model has a significantly higher degree of agreement with the experimental measurement dates and is more suitable for the quantitative characterization of the nonlinear capacitance characteristics of GaN HEMTs. This research provides support for the accurate application of device models in the design of high-frequency circuits in subsequent studies.

12 September 2026 in Micromachines
Verified
Journal Article
Open access
PDF file
CWChuangye Wang
Chuangye Wang
LTLiyue Tang
Liyue Tang
AZAo Zhang
Ao Zhang
JCJiali Cheng
Jiali Cheng
CLCaoyu Li
Caoyu Li
CWChang WU
Chang WU
This paper presents a complete modeling flow for GaN Schottky barrier diodes (SBDs), encompassing parasitic parameter de-embedding, small-signal equivalent circuit extraction, and DC characteristic analysis. The open/short de-embedding method is adopted to extract the parasitic parameters of the Ground–Signal–Ground (GSG) pads. A bias-partitioning strategy is employed to extract the intrinsic small-signal parameters, and the depletion capacitance model is used to physically fit the C-V characteristics. The forward Direct Current (DC) conduction current is described by the thermionic emission model, while the reverse leakage is modeled using a piecewise approach: the Poole–Frenkel (PF) trap-assisted emission model is applied in the low-bias region, and a double-exponential decay empirical model is introduced in the high-bias region, achieving high-precision fitting over the full bias range (−100 V~3 V). More importantly, this paper identifies a significant discrepancy between the series resistance extracted from DC measurements and that from Radio Frequency (RF) measurements, and attributes it to the frequency dispersion effect induced by trap states. The study demonstrates that combining DC and high-frequency characterization not only enables the construction of an accurate modeling framework, but also reveals the trap-related physical mechanisms within the device.