There are a wealth of studies on photovoltaic cell technologies, however their performance in different climatic or geographies over an extended period is not completely established. The objective of this paper is to add to this area of study with an analysis of the principle photovoltaic technologies: monocrystalline silicon (mc-Si), polycrystalline silicon (pc-Si), tandem structure of amorphous silicon and microcrystalline silicon (a-Si/µc-Si tandem), cadmium telluride/cadmium sulfide (CdTe/CdS), copper-indium diselenide (CIS) and monocrystalline silicon with double contact back technology (mc-dc-Si), in the climatic conditions particular to the middle latitude urban environment of Madrid (Spain). To carry out this study six photovoltaic subsystems of peak power 1 kWp approximately have been installed for each selected technology on the roof of the Escuela Técnica Superior de Ingeniería y Diseño Industrial (ETSIDI) of the Universidad Politécnica de Madrid (UPM) in Spain. Each subsystem has an inverter of the same model and power for its connection to the internal electricity network of the university. This paper analyzes the energy performance of the six subsystems, calculating the reference production rates and losses, from February 2013 to December 2015. The result of the study is the extensive capture of data and detailed analysis of real time energy yields and performance ratios of key technologies resulting with patterns in line with those of other regions with comparable climatic conditions.
20 July 2020 in IEEE Transactions on Electron Devices
In this article, by means of a 2-D ensemble Monte Carlo simulator, the Schottky barrier diodes (SBDs) with realistic geometries based on GaAs and GaN are studied as promising devices for increasing the high-frequency performance- and power-handling capability of frequency mixers and multipliers. The nonlinearity of the capacitance-voltage (CV) characteristic is the most important parameter for optimizing the performance of SBDs as frequency multipliers. The small size of the diodes used for ultrahigh-frequency applications makes the value of its intrinsic capacitance to deviate from the ideal one due to fringing effects. We have observed that the value of the edge capacitance well into reverse bias does not depend on the applied voltage. We define an edge-effect parameter β, which, interestingly, is affected by the presence or absence of surface charges at the semiconductor-dielectric interface σ. Two physical models have been considered: a fixed σ related to a surface potential Vₛ constant surface-charge model (CCM) and a self-consistent model in which the local value of σ is dynamically evaluated depending on the surrounding electron density self-consistent surface-charge model (SCCM). Using the CCM, we obtain that β depends on the depth of the depletion region Wₛ created by the surface charges, nearly irrespectively of the epilayer doping or semiconductor type. The more realistic SCCM indicates that, at low frequencies, when the surface charges are able to follow the variations of the applied voltage, the value of β approaches the one obtained without surface charges, while the high-frequency value (the significant one) is smaller.
In this paper, we report an analysis of reverse current mechanisms observed in GaN Schottky barrier diodes leading to hysteretic behavior of the I–V curves at low temperature. By means of DC measurements from 33 to 475 K, we demonstrate the presence of two leakage mechanisms when comparing the experiments with the results obtained using a unified model to predict the ideal reverse current of the diode. Poole–Frenkel emission is the dominant mechanism for temperatures above 200 K, while trap-assisted tunneling prevails for lower temperatures, where also, hysteresis cycles are revealed by means of DC dual-sweep voltage measurements. The energy of the corresponding traps has also been determined, being around 0.2 and 0.45 eV, respectively. The hysteresis phenomenon is attributed to the bias-induced occupancy of the energy states originating the leakage-current processes, which leads to the reduction of the reverse current after a high negative voltage is applied to the diode.
A model to predict the ideal reverse leakage currents in Schottky barrier diodes, namely, thermionic emission and tunneling components, has been developed and tested by means of current–voltage–temperature measurements in GaN-on-SiC devices. The model addresses both current components and both forward and reverse polarities in a unified way and with the same set of parameters. The values of the main parameters (barrier height, series resistance, and ideality factor) are extracted from the fitting of the forward-bias I–V curves and then used to predict the reverse-bias behavior without any further adjustment. An excellent agreement with the I–V curves measured in the forward bias in the GaN diode under analysis has been achieved in a wide range of temperatures (275–475 K). In reverse bias, at temperatures higher than 425 K, a quasi-ideal behavior is found, but additional mechanisms (most likely trap-assisted tunneling) lead to an excess of leakage current at lower temperatures. We demonstrate the importance of the inclusion of image-charge effects in the model in order to correctly predict the values of the reverse leakage current. Relevant physical information, like the energy range at which most of the tunnel injection takes place or the distance from the interface at which tunneled electrons emerge, is also provided by the model.
11 June 2024 in IEEE Transactions on Electron Devices
The hysteresis cycles observed in the reverse leakage current measured at low temperatures in GaN-on-sapphire Schottky barrier diodes (SBDs) have been deeply studied and interpreted in terms of trap-assisted tunneling (TAT) compatible with the existence of a trap energy band (TEB) near the metal-semiconductor interface. The analysis of the energies for which the maximum tunneling current occurs, both direct and through this trap band, allows us to explain the behaviors found at different temperatures. Starting from empty trap states by previous illumination, transient current measurements performed under different preconditioning voltages evidence a progressive partial filling/release of the trap energy levels, confirmed as well by pulsed measurements. Captured/released electrons modify the number of trap states available for tunneling and thus the current level. As a consequence, tunneling processes in the go and return paths take place through levels with different occupations within the TEB, originating the hysteresis cycle.
26 July 2021 in IEEE Transactions on Electron Devices
The influence of passivation on the edge effects (EEs) present in the capacitance-voltage ( C- V) characteristics of GaN Schottky barrier diodes (SBDs) with realistic geometry is analyzed by means of Monte Carlo simulations. The enhancement of the performance of SBDs as frequency multipliers is based on the optimization of the nonlinearity of the C- V curve, where EEs, strongly influenced by the dielectric passivation of the diode, play a significant role and must be carefully considered. The extra capacitance associated with EEs is affected by the presence of surface charges at the semiconductor/dielectric interface, which is considered by means of a self-consistent model in which the local value of the surface charge is updated according to the surrounding electron density. Our results indicate that, in realistic SBD geometries, a higher dielectric constant of the passivation material leads to more pronounced EEs. The thickness of the dielectric and the lateral extension of the epilayer are also important parameters to be taken into account when dealing with EEs.