Wu HE

Mrs. Wu HE


Research Focus & Metrics

Academic Career Length

1Year (2026-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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SZSHENGZONG ZHANG
SHENGZONG ZHANG
PLPeng Luo
Peng Luo
ZSZejin Sun
Zejin Sun
JPJunlin Pan
Junlin Pan
WHWu HE
Wu HE
CTChuan Tian
Chuan Tian
To address the challenge in real-time communication mooring systems where clock synchronization and data transmission are difficult to achieve simultaneously over a single jacketed steel cable loop, this paper develops a dual-carrier inductively coupled communication (ICC) scheme based on the design concept of frequency division multiplexing (FDM). Two carrier signals with distinct frequencies and modulation schemes are loaded in parallel onto the same cable loop, using binary differential phase-shift keying (2DPSK) to carry minute-level data communication and binary phase-shift keying (2PSK) to carry microsecond-level clock synchronization broadcasts. To resolve inter-carrier crosstalk and channel attenuation, a single-stage multiple feedback (MFB) narrow bandpass filter and a three-stage analog front-end consisting of “passive high-impedance filtering, differential-to-single-ended conversion, and multistage active high-gain amplification” are designed in hardware, achieving efficient separation of hybrid signals and suppression of noise. In software, a combined demodulation architecture based on digital delay differential and zero-crossing decision, along with a digital Costas loop, is constructed to accomplish data demodulation and high-precision pulse-per-second (PPS) clock recovery. Laboratory and 300 m nearshore sea trial results demonstrate that the system achieves a packet reception ratio of over 89.60%, an error-free packet delivery ratio exceeding 83.24% with a bit error ratio below 0.22%, and maintains a clock synchronization error within 200 µs.