The growing trend for electric vehicles (EVs) and fast-charging stations (FCSs) will cause the overloading of grids due to the high current injection from FCSs’ converters. The insensitive nature of the state of charge (SOC) of EV batteries during FCS operation often results in grid instability problems, such as voltage and frequency deviation at the point of common coupling (PCC). Therefore, many researchers have focused on two-stage converter control (TSCC) and single-stage converter (SSC) control for FCS stability enhancement, and suggested that SSC architectures are superior in performance, unlike the TSCC methods. However, only a few research works have focused on SSC techniques, despite the techniques’ ability to provide inertia and damping support through the virtual synchronous machine (VSM) strategy due to power decoupling and dynamic response problems. TSCC methods deploy current or voltage control for controlling EVs’ SOC battery charging through proportional-integral (PI), proportional-resonant (PR), deadbeat or proportional-integral-derivative (PID) controllers, but these are relegated by high current harmonics, frequency fluctuation and switching losses due to transient switching. This paper reviewed the linkage between the latest research contributions, issues associated with TSCC and SSC techniques, and the performance evaluation of the techniques, and subsequently identified the research gaps and proposed SSC control with SOC consideration for further research studies.

Actual voltage-source converters (VSCs) advocate flexible and fast controls, low-voltage ripple levels at the dc-link, and grid compliances for operating under imbalanced grid conditions. To counteract these needs, this investigation focuses on proposing a straightforward passivity-inspired controller structure that facilitates the reference signals' generation to appropriately and quickly regulate grid currents and dc voltage ripples under unbalanced conditions, complying with the harmonic standard (ANSI/IEEE Std 519) thanks to the mitigation of the $\text{2}\omega$ oscillation. Since the proposal works on the abc reference frame, this prevents the use of a phase-locked loop, abc/dq0/abc and abc/$\alpha \beta$/abc transformations, and it reduces the computational burden in the prototyping stage. The results in both real-time simulation and experimental testbed confirm the controller's effectiveness for working under imbalance grid conditions greater than 35% of voltage drops in one or two phases, operating with low 2$\omega$ oscillations, and providing reactive power control. Besides, the controller is featured for settling back the voltage reference in less than 40 ms, guaranteeing voltage ripple levels below 5%, and fulfilling the harmonic standard since it reaches a total harmonic distortion maximum of 2.9%. Also, the passivity-based controller is characterized for reducing the computational burden by 73% compared to the widely used conventional, ensuring a lower computational cost than other approaches that use dq control as a basis.

The power electronic transformer (PET) is an emerging technology that is quickly becoming a key component of the next-to-come power distribution networks (PDNs), due to its versatility on energy management, as well as, the improvement on the quality of the energy. PDNs are characterized by their unbalanced conditions, causing that PETs driven by conventional dq0 controls introduce current distortions on the primary winding of the transformer. Such distortion is evidenced in the 2 $\boldsymbol{\omega }$ oscillations of ${V_d}$ and ${V_q}$ acting as harmonic sources. In this sense, this article proposes a novel control approach for PETs. The key idea behind of this proposal consists of operating each phase independently, which is achieved through the enclosed rectification and the mitigation of the 2 $\boldsymbol{\omega }$ oscillations in a dual active bridge topology. The attained advantages by this control scheme are: a) balancing of the primary winding currents; b) unitary power factor; c) negligible harmonic distortion; and d) 2 $\boldsymbol{\omega }$ oscillation mitigation on the dc bus.