Photovoltaic (PV) panels need to be exposed to sufficient solar radiation to produce the desired amount of electrical power. However, due to the stochastic nature of solar irradiance, smooth solar energy harvesting for power generation is challenging. Most of the available literature uses machine learning models trained with data gathered over a single time horizon from a location to forecast solar radiation. This study uses eight machine learning models trained with data gathered at various time horizons over two years in Limpopo, South Africa, to forecast solar irradiance. The goal was to study how the time intervals for forecasting the patterns of solar radiation affect the performance of the models in addition to determining their accuracy. The results of the experiments generally demonstrate that the models’ accuracy decreases as the prediction horizons get longer. Predictions were made at 5, 10, 15, 30, and 60 min intervals. In general, the deep learning models outperformed the conventional machine learning models. The Convolutional Long Short-Term Memory (ConvLSTM) model achieved the best Root Mean Square Error (RMSE) of 7.43 at a 5 min interval. The Multilayer Perceptron (MLP) model, however, outperformed other models in most of the prediction intervals.

In this paper, a voltage regulation system is proposed that improves the voltage regulation process in power distribution networks with a high penetration of embedded generation. The principle of the proposed system is to alter the existing and conventional substation busbar monitoring technique of the on‐load tap changer (OLTC) commonly implemented in medium voltage power distribution networks. The system alternatively uses measured multiple voltage magnitudes on different vital locations on the power distribution network, it thereafter isolates the uppermost and the lowermost measured voltage magnitudes from all voltage inputs received. The sampled uppermost and lowermost voltage magnitudes are compared with predetermined set voltage limits, and the OLTC will change its tap settings to keep the uppermost and lowermost voltage magnitudes within the set voltage limits. To avoid tap hunting when set voltage limits cannot be maintained, the system will reduce the active power generated by the embedded generator to a predetermined value. On the other hand, the system will monitor the load on the feeder in which the embedded generator is connected and then increase the embedded generator active power generation again when the load start increasing. The proposed voltage regulation system was tested on a typical South African power distribution network consisting of a substation with an OLTC equipped power transformer that is simultaneously regulating voltage of three medium voltage feeders. The voltage regulation system managed successfully to keep feeder's voltages within the acceptable limits.

Soft-Core architecture for Analogue to Digital Converter (ADC) sampling is useful for mixed signal applications. Soft-core architecture for cutting edge odd or even ADC sampling with interface to block RAM memory has not been found. Soft-core architecture as a concept has become popular due to the advantage of customization for different applications as compared to general-core architecture suited for single application. The latest generation of piece wise sampling is odd sampling and was introduced in the second decade of the 20th century. Odd and even order sampling techniques are analogue in nature driven by a tuned (tuned for odd or even) mixer. This paper proposes a third-generation piece wise sampling with soft-core architecture that enables an option to select both odd and even while interfacing to memory mapping. The proposed odd/even has superior SNR performance of 6 dB as compared to existing architecture such as Mod-∆ which recorded worst performance of 18 dB. Advances in soft-core technology have allowed a niche odd/even switching field to be identified and studied, the study has also been extended to include memory architecture.

Digitization is at the center of fourth industrial revolution (4IR) with previously analog systems being digitized through an analog-to-digital converter. In addition, 4IR applications such as fifth generation (5G) Cellular Networks Technology and Cognitive Electronic Warfare (EW) at some point interface digitally through an analog-to-digital converter. Efficient use of digital resources such as memory, largely depends on the signal sampling design of analog-to-digital converters. Existing even order sampling has been found to perform better than traditional sampling techniques. Research on the efficiency of a digital interface with a 4IR platform is still in its infancy. This paper presents a performance study of three sampling techniques: the proposed new and novel odd/even order sampling architecture, existing Mod-∆, and traditional 1st order delta-sigma, to address this. Step-size signal-to-noise (SNR), dynamic range, and sampling frequency are also studied. It was found that the proposed new and novel odd/even order sampling achieved an SNR performance of 6 dB in comparison to 18 dB for Mod-∆. Sampling frequency findings indicated that the proposed new and novel odd/even order sampling achieved a sampling frequency of 2 kHz in comparison to 8 kHz from a traditional 1st order sigma-delta. Dynamic range findings indicated that the proposed odd/even order sampling has achieved a dynamic range of 1.088 volts/ms in comparison to 1.185 volts/ms from a traditional 1st order sigma-delta. Findings have indicated that the proposed odd/even order sampling has superior SNR and sampling frequency performances, while the dynamic range is reduced by 8%.