Do Khac Tiep, Kinam Lee, Dae-Yeong Im, Bongwoo Kwak, and Young-Jae Ryoo. IJFIS 2018;18:220-8. https://doi.org/10.5391/IJFIS.2018.18.3.220

In this paper, an add-on type pulse charger is proposed to shorten the charging time of a lithium ion battery. To evaluate the performance of the proposed pulse charge method, an add-on type pulse charger prototype is designed and implemented. Pulse charging is applied to 18650 cylindrical lithium ion battery packs with 10 series and 2 parallel structures. The proposed pulse charger is controlled by pulse duty, frequency and magnitude. Various experimental conditions are applied to optimize the charging parameters of the pulse charging technique. Battery charging data are analyzed according to the current magnitude and duty at 500 Hz and 1000 Hz and 2000 Hz frequency conditions. The proposed system is similar to the charging speed of the constant current method under new battery conditions. However, it was confirmed that as the battery performance is degraded, the charging speed due to pulse charging increases. Thus, in applications where battery charging/discharging occurs frequently, the proposed pulse charger has the advantage of fast charging in the long run over conventional constant current (CC) chargers.

A digital control scheme for GaN transistor-based totem pole power factor correction (PFC) is proposed in this paper. At the zero crossing, the totem pole PFC has a discontinuous conduction mode (DCM) current section because of its driving method and circuit structure. In the DCM current section, when a typical synchronous switching technique is applied, the inductor current is reduced to less than zero, thereby reducing efficiency. Moreover, because of the nature of the circuit, power may be transferred in reverse. To prevent this, a new synchronous switch technique using the cycle by cycle (CBC) trip function of the digital signal processor (DSP) is proposed. This proposed technique turns off the synchronization switch according to the set DCM level. Consequently, even at a low DCM level, the inductor current is clamped to zero, enabling stable synchronous switching.