Ambient assisted living (AAL) has the ambitious goal of improving the quality of life and maintaining independence of older and vulnerable people through the use of technology. Most of the western world will see a very large increase in the number of

A distributed and tamper proof media transaction framework is proposed based on the blockchain model. Current multimedia distribution does not preserve self-retrievable information of transaction trails or content modification histories. For example, digital copies of valuable artworks, creative media and entertainment contents are distributed for various purposes including exhibitions, gallery collections or in media production workflow. Original media is often edited for creative content preparation or tampered with to fabricate false propaganda over social media. However there is no existing trusted mechanism that can easily retrieve either the transaction trails or the modification histories. We propose a novel watermarking based Multimedia Blockchain framework that can address such issues. The unique watermark information contains two pieces of information: a) a cryptographic hash that contains transaction histories (blockchain transactions log) and b) an image hash that preserves retrievable original media content. Once the watermark is extracted, first part of the watermark is passed to a distributed ledger to retrieve the historical transaction trail and the latter part is used to identify the edited / tampered regions. The paper outlines the requirements, the challenges and demonstrates the proof of this concept.

Internet of Things (IoT) gains popularity in recent times due to its flexibility, usability, diverse applicability and ease of deployment. However, the issues related to security are less explored. The IoT devices are light weight in nature and have low computation power, low battery life and low memory. As incorporating security features are resource expensive, IoT devices are often found to be less protected and in recent times, more IoT devices have been routinely attacked due to high profile security flaws. This study aims to explore the security vulnerabilities of IoT devices particularly that use low power wide area networks (LPWANs). In this work, long range wide area network (LoRaWAN) based IoT security vulnerabilities are scrutinised and loopholes are identified. An attack was designed and simulated with the use of a predictive model of the device data generation. The study demonstrated that by predicting the data generation model, the jamming attack can be carried out to block devices from sending data successfully. This research will aid in the continual development of any necessary countermeasures and mitigations for LoRaWAN and LPWAN functionality of IoT networks in general.

Imperceptibility and robustness are two complementary but fundamental requirements of any watermarking algorithm. Low strength watermarking yields high imperceptibility but exhibits poor robustness. High strength watermarking schemes achieve good robustness but often infuse distortions resulting in poor visual quality in host media. If distortion due to high strength watermarking can avoid visually attentive regions, such distortions are unlikely to be noticeable to any viewer. In this paper, we exploit this concept and propose a novel visual attention-based highly robust image watermarking methodology by embedding lower and higher strength watermarks in visually salient and non-salient regions, respectively. A new low complexity wavelet domain visual attention model is proposed that allows us to design new robust watermarking algorithms. The proposed new saliency model outperforms the state-of-the-art method in joint saliency detection and low computational complexity performances. In evaluating watermarking performances, the proposed blind and non-blind algorithms exhibit increased robustness to various natural image processing and filtering attacks with minimal or no effect on image quality, as verified by both subjective and objective visual quality evaluation. Up to 25% and 40% improvement against JPEG2000 compression and common filtering attacks, respectively, are reported against the existing algorithms that do not use a visual attention model.

Water hyacinth (Pontederia crassipes, also known as Eichhornia crassipes) is a highly invasive aquatic macrophyte species, indigenous to Amazonia, Brazil and tropical South America. It was introduced to India in 1896 and has now become an environmental and social challenge throughout the country in community ponds, freshwater lakes, irrigation channels, rivers and most other surface waterbodies. Considering its large speed of propagation on the water surface under conducive conditions and the adverse impact the infesting weed has, constant monitoring is needed to aid civic bodies, governments and policy makers involved in remedial measures. The synoptic coverage provided by satellite imaging and other remote sensing practices make it convenient to find a solution using this type of data. While there is an established background for the practice of remote sensing in the detection of aquatic plants, the use of Synthetic Aperture Radar (SAR) has yet to be fully exploited in the detection of water hyacinth. This research focusses on detecting water hyacinth within Vembanad Lake, Kuttanad, India. Here, results show that the monitoring of water hyacinth has proven to be possible using Sentinel-1 SAR data. A quantitative analysis of detection performance is presented using traditional and state-of-the-art change detectors. Analysis of these more powerful detectors showed true positive detection ratings of ~95% with 0.1% false alarm, showing significantly greater positive detection ratings when compared to the more traditional detectors. We are therefore confident that water hyacinth can be monitored using SAR data provided the extent of the infestation is significantly larger than the resolution cell (bigger than a quarter of a hectare).

Memory is the biggest limiting factor to the widespread use of FPGAs for high-level image processing, which require complete frame(s) to be stored in situ. Since FPGAs have limited on-chip memory capabilities, efficient use of such resources is essential to meet performance, size and power constraints. In this paper, we investigate allocation of on-chip memory resources in order to minimize resource usage and power consumption, contributing to the realization of power-efficient high-level image processing fully contained on FPGAs. We propose methods for generating memory architectures, from both Hardware Description Languages and High Level Synthesis designs, which minimize memory usage and power consumption. Based on a formalization of on-chip memory configuration options and a power model, we demonstrate how our partitioning algorithms can outperform traditional strategies. Compared to commercial FPGA synthesis and High Level Synthesis tools, our results show that the proposed algorithms can result in up to 60% higher utilization efficiency, increasing the sizes and/or number of frames that can be accommodated, and reduce frame buffers’ dynamic power consumption by up to approximately 70%. In our experiments using Optical Flow and MeanShift Tracking, representative high-level algorithms, data show that partitioning algorithms can reduce total power by up to 25% and 30%, respectively, without impacting performance.