TBX21 recode T-bet which is an important transcription factor that drives the Th1 immune response primarily by promoting expression of the interferon-gamma (IFNG) gene. Recent studies have shown that genetic variants in TBX21 and IFNG are connected with risk of systemic lupus erythematosus (SLE). The aim of the present study was to replicate these genetic associations with SLE in Anhui Chinese population. Genotyping of 3 variants (rs4794067 in TBX21, rs2069705 and rs2069718 in IFNG) was performed. A total of 3732 subjects were included in the final analysis. The study only identified the association of rs2069705 with SLE susceptibility (T vs. C: odds ratio [OR] = 1.12, 95% confidence interval [CI] = 1.00–1.26, P = 0.046). Combined analysis with Hong Kong GWAS showed that the OR for rs2069705 was 1.10 (95% CI: 1.01–1.21, P = 0.027). Further pooled analysis with Korean populations involving 10498 subjects showed a more significant association between rs2069705 and SLE (T vs. C: OR = 1.11, 95%CI = 1.04–1.19, P = 0.002; TT + TC vs. CC: OR = 1.11, 95%CI = 1.02–1.21, P = 0.012; TT vs. TC + CC: OR = 1.28, 95%CI = 1.07–1.54, P = 0.008; TT vs. CC: OR = 1.33, 95%CI = 1.10–1.60, P = 0.003). In addition, we also identified a significant genetic interaction between rs2069705 and rs4794067 in Anhui Chinese population. Our study suggests that IFNG and IFNG-TBX21 interaction are involved in SLE susceptibility.

Three-dimensional (3D) deconvolution is widely used in many computer vision applications. However, most previous works have only focused on accelerating two-dimensional (2D) deconvolutional neural networks (DCNNs) on Field-Programmable Gate Arrays (FPGAs), while the acceleration of 3D DCNNs has not been well studied in depth as they have higher computational complexity and sparsity than 2D DCNNs. In this paper, we focus on the acceleration of both 2D and 3D sparse DCNNs on FPGAs by proposing efficient schemes for mapping 2D and 3D sparse DCNNs on a uniform architecture. Firstly, a pruning method is used to prune unimportant network connections and increase the sparsity of weights. After being pruned, the number of parameters of DCNNs is reduced significantly without accuracy loss. Secondly, the remaining non-zero weights are encoded in coordinate (COO) format, reducing the memory demands of parameters. Finally, to demonstrate the effectiveness of our work, we implement our accelerator design on the Xilinx VC709 evaluation platform for four real-life 2D and 3D DCNNs. After the first two steps, the storage required of DCNNs is reduced up to 3.9×. Results show that the performance of our method on the accelerator outperforms that of the our prior work by 2.5× to 3.6× in latency.

Three-dimensional deconvolution is widely used in many computer vision applications. However, most previous works have only focused on accelerating 2D deconvolutional neural networks (DCNNs) on FPGAs, while the acceleration of 3D DCNNs has not been studied in depth as they have higher computational complexity and sparsity than 2D DCNNs. In this paper, we focus on the acceleration of both 2D and 3D DCNNs on FPGAs by proposing efficient schemes for mapping 2D and 3D DCNNs on a uniform architecture. By implementing our design on the Xilinx VC709 platform for four real-life 2D and 3D DCNNs, we can achieve up to 3.0 TOPS with high hardware efficiency. Comparisons with CPU and GPU solutions demonstrate that we can achieve an improvement of up to 63.3X in throughput relative to a CPU solution and an improvement of up to 8.3X in energy efficiency compared to a GPU solution.