Over the past 60 years, satellite technology has demonstrated its usefulness successfully. However, this usefulness is at stake from a future point of view, due to the well-admitted orbital/space debris threat. This article thoroughly reviews all aspects of space debris issue including causes, amount and sizes of orbital debris, potential threats, counter-strategies with their latest status and related legal issues to highlight the criticality and urgency of the problem. This review elaborates the fact that despite all the worries and threats, the efforts to confront this challenge are considerably insufficient until today. This bitter reality demands for at-least curtailing the number of future launches to ensure the long-term sustainability of space, until the improvement in debris situation. However, contradictory to this necessity, large satellite constellations have been proposed that can drastically increase the existing orbital population in coming years. This approach will certainly not help in improving the space environment in the future; instead, it can worsen the space environment situation as recent studies shows. Also, space resources (i.e. orbital slots and frequencies) are limited to accommodate many more satellite projects from commercial and government organization in the future. So, there is a serious question of how the space industry can move forward to maintain a balance in controlling the future number of the satellite while accommodating many commercial or government space entities. This article also identifies two optimized approaches as a way forward for future satellite projects that can also enhance the effectiveness of space technology in the future.
High-speed data communication is becoming essential for many applications, including satellite communication. The security algorithms associated with the communication of information are also required to have high-speed for coping up with the communication speed. Moreover, the Authenticated Encryption (AE) algorithms provide high-speed communication and security services include data encryption, authentication, and integrity. The AE algorithms are available with serial and parallel architectures; among them, the Galois Counter Mode (GCM) algorithm has a parallel architecture. The Synthetic Initialization Vector (SIV) mode in the AES-GCM-SIV algorithm provides the nonce misuse protection using the GCM algorithm. Besides, reduced data throughput is provided using the AES-GCM-SIV algorithm as compared to the AES-GCM algorithm. This work introduced a parallel algorithm with rekeying and randomization of the initialization vector for high data throughput, nonce misuse protection, and side-channel attack protection. The implementation of the proposed algorithm is performed on Field Programmable Gate Array (FPGA) and it’s compared with the FPGA implementations of AES-GCM, AES-GCM-SIV, and recently introduced algorithms. The optimization of the proposed algorithm and security analysis is presented for space application using different optimizations and a combination of optimizations.
1 April 2019 in Journal of Physics: Conference Series
Integration of space resources (e.g., satellites) in different orbits with the terrestrial/ground network (e.g., internet) is the new evolving era of information technology. This kind of information network can expand the ground services such as internet to the whole world with the help of satellites' broader coverage. On the other hand, it can also provide realtime access to the satellite's useful data (e.g. images of earth), for nearly everyone on the globe. For these reasons, there has been enormous amount of research on this topic, and different network architectures are proposed for the integration of space and ground networks for different applications. However, most of them are either general abstract architecture or for the single dedicated application. Also for such a network, it is desirable that it should be based on the TCP/IP (Transmission control protocol/internet protocol) stack for interoperability with terrestrial networks. However, the biggest challenge for this is the dynamic network topologies due to orbital dynamics of space nodes. In this paper, we have addressed both of these issues by proposing a Space-Air-Ground Information Network (SAGIN) Architecture, which can provide almost all of the services of space and ground networks for all the users around the world according to varying needs of users. Our proposed SAGIN architecture is IP-based to provide interoperability and compatibility with the already deployed ground network. We have also addressed the challenge of dynamic nature of the network topology by designing a simple mechanism which automatically maintains a relatively static IPs of nodes in space (satellites), despite their rapid physical movement in orbits. This SAGIN architecture could be among optimized candidate architecture for future to have for many countries (either individually or by the cooperation of different regional countries). Because, it can provide all the services to nearly everyone in the world, in contrast to traditional individual satellites providing limited services to a limited number of users.
The technology of remote sensing, in particular earth observation, is continuously growing since its advent; especially in the last decade, it has attained remarkable advancement. The proof is that now many earth observation satellites, with the courtesy of high-resolution cameras, can provide such images that enable us to identify objects on the surface of the earth with less than 0.5-meter resolution. With this escalation in technology, subsequent applications, as well as the rewards of this technology for human life, are also budding speedily. However, till now earth observation satellites follow the traditional "store and later download" method for transferring captured images to ground. This method has some limitations, especially from a future perspective. In this paper, we have identified these limitations and presented an alternate idea in which the satellite, instead of storing, broadcasts encrypted images to the ground as soon as they are captured in space. This approach provides three unique features that traditional system lacks: real-time monitoring of a location is possible, the image data is directly accessible to individuals rather than only ground station, and the extra burden is reduced that traditional system puts on satellite for large bandwidth and appropriate fast & high data transfer protocol. For such architecture, we have proposed an authentication protocol so that only legitimate users can utilize satellite image data. We have also analyzed that our protocol is not only secure, simple and efficient, but it also provides fast switching from one satellite to another and consequently least interruption in image reception.
1 January 2020 in International Journal of Computer Theory and Engineering
The digital design methodologies are evolving with the increase of digital systems utilization in daily life. The Model Based Design (MBD) methodology provides a unique methodology for design and implementation of digital systems on Field Programmable Gate Array (FPGA). Recently, a lot of research effort has been put to exploit new methodologies for designing and prototyping of digital systems on FPGA. The FPGA hardware provides prototyping which provides means of verifying your design at an early stage of development cycle. This helps to evaluate design trade-offs by testing the design in real-time on hardware. Making prototypes is a common practice in research-oriented projects. However, it requires excess development time which increases time to market of the product. This paper illustrates the use of reconfigurable MBD for rapid prototyping of digital systems on Microsemi ACTEL FPGAs for improving the design-cycle and time-to-market of a product. The model is simulated to verify the functionality of the design at system-level and a high-level code is generated from the MBD toolset embedded in MATLAB for hardware implementation. Then, a High-Level Synthesis (HLS) is performed on the generated code which converts this high-level code into Verilog-HDL suitable for hardware implementation on FPGA. Hence, this work presents a methodology and its analysis for design of digital system using high-level synthesis on Microsemi ACTEL FPGA.