The stability of the grid-connected inverter (GCI) system in weak grids is deteriorated due to the asymmetric positive-feedback loops (APFLs) introduced by the phase-locked loop (PLL) structure. Under the same main circuit parameters and control loop parameters, the small-signal models of the GCI controlled in dq domain and αβ domain are constructed, respectively. Compared with the small-signal model of the GCI controlled in dq domain, the number of APFLs introduced by the PLL of GCI controlled in αβ domain is one less. Moreover, the mechanism why the stability of the GCI controlled in αβ domain is stronger than that controlled in dq domain is analyzed. Meanwhile, the influence degree and mechanism of the APFLs in different paths of the small-signal models for the stability of GCI are revealed for the first time. This lays a theoretical foundation for the analysis and design of asymmetric control strategies used to improve the stability of GCI in weak grids. Finally, simulations and experiments verify the correctness of the theoretical analysis.

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions.

This paper proposes a dual-function dynamic voltage restorer (DFDVR) with fault current-limiting capability. The new topology can operate under different modes: the short-circuit fault current-limiting mode and the compensation mode for voltage fluctuation. Different functions of the DFDVR are achieved by controlling a brake chopper circuit and anti-parallel thyristors. During fault conditions, the anti-parallel thyristors are deactivated to protect the DC-side capacitor, and the duration of the on- and off-periods of the semiconductor switch in the brake chopper circuit are controlled to adjust fault current amplitudes. During voltage sags, the anti-parallel thyristors are activated, and the brake chopper circuit is turned off by controlling the gate turn-off thyristor (GTO) in the brake chopper circuit, thus making the DFDVR similar to a conventional DVR. The control scheme and optimal parameter selection of the DFDVR are provided. The design methodology of the DFDVR was verified through simulations performed using the PSCAD/EMTDC software. The experimental results prove the capability and effectiveness of the DFDVR topology.

This paper introduces an efficient strategy to improve the voltage quality of sensitive loads with the optimal utilization of a dynamic voltage restorer (DVR). Traditional control strategies mainly focus on the voltage compensation stage to reduce the voltage rating of the DVR or minimize the required capacity of the energy storage device and the phase jump correction in the early stage of the compensation has attracted more attention as well. In reality, phase jump issues may occur in the initial and final stages of compensation, and they must be avoided for most loads, but few works focus on how a DVR can smoothly exit the system after the fault elimination. With the main objective of mitigating the phase jump in the load side voltage while improving the overall sag compensation time, this study involves the following: 1) Based on energy-optimized compensation strategies, the proposed approach aims at completing the smooth transition of the transient process during the voltage compensation and recovery stages and ensuring effective linkage from the former to the latter. 2) The mode operation boundaries in the two stages are derived and compared, and the updated procedure of a new injected reference voltage is activated to prevent the system from going outside its operating limits. Furthermore, the operation logic and the overall control scheme are elaborated, which ensure that the proposed approach preserves superior controllability to provide flexible voltage support. Finally, a combination of simulation and experimental results is used to validate the performance of the proposed method.

This article proposes an improved hybrid parallel compensator (IHPC) for enhancing the power transfer capability of a photovoltaic (PV) grid-connected inverter. A thyristor switched capacitor (TSC) module is used in series with a conventional inductive-coupling voltage source inverter to reduce the dc-link voltage. Under a low dc-link voltage, the voltage across the insulated gate bipolar transistor (IGBT) will also be low, which will reduce the voltage stress of the IGBT, thereby improving the reliability and reducing the loss of the voltage resource inverter. First, the mechanism of reactive compensation for improving the PV inverter power transmission capability is analyzed. Then, the circuit configuration and operating principle of the IHPC are introduced. After that, an optimal control strategy for the IHPC is proposed to address the resonance problem caused by the TSC connected in series with the L filter and to improve the compensation performance of the IHPC. Finally, the effectiveness of the proposed IHPC and the control method is validated by the simulation and experiments. The results show that the IHPC with optimal control strategy can achieve continuous reactive power compensation under a low dc-link voltage, thereby enhance PV power transfer capability.

The reliable extinguishment of a single phase-to-ground arc is the key issue for safe and reliable operation in the distribution network. However, since the existing arc suppression methods are normally affected by the line parameters, the residual current (RC) at the grounding point still exists, then the grounding arc is hard to be extinguished reliably. Thus, an adaptive active voltage-type arc suppression (AAVAS) strategy that can reliably inhibit the RC at the grounding point is proposed in this article. First, the mechanism of the traditional voltage-type arc extinguishing method affected by the line parameters is proved, and the variation rules are given for the RC under different fault distances and grounding resistance. Second, the variation characteristics are analyzed for the faulty line current before and after arc extinguishing. On this basis, it is proposed to add the residual voltage compensation ring to the traditional voltage-type control strategy, which can effectively offset the influence of voltage drop on faulty-phase line impedance. Then, the Bode diagram analysis shows that the presented strategy performs well regardless of ground-fault conditions. Finally, the feasibility and effectiveness of the proposed AAVAS strategy are verified by the simulation and experiment results.