Ming-Yuan CHENG

Dr. Ming-Yuan CHENG

orcid

Research Focus & Metrics

Academic Career Length

24Years (2003-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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9 April 2010 in Sensors
Verified
Journal Article
Open access
PDF file
WSWen-Pin Shih
Wen-Pin Shih
LTLi-Chi Tsao
Li-Chi Tsao
CLChian-Wen Lee
Chian-Wen Lee
MCMing-Yuan CHENG
Ming-Yuan CHENG
CCChienliu Chang
Chienliu Chang
Kuang-Chao FanKuang-Chao Fan
Kuang-Chao Fan
This paper presents a novel method to fabricate temperature sensor arrays by dispensing a graphite-polydimethylsiloxane composite on flexible polyimide films. The fabricated temperature sensor array has 64 sensing cells in a 4 × 4 cm2 area. The sensor array can be used as humanoid artificial skin for sensation system of robots. Interdigitated copper electrodes were patterned on the flexible polyimide substrate for determining the resistivity change of the composites subjected to ambient temperature variations. Polydimethylsiloxane was used as the matrix. Composites of different graphite volume fractions for large dynamic range from 30 ºC to 110 ºC have been investigated. Our experiments showed that graphite powder provided the composite high temperature sensitivity. The fabricated temperature sensor array has been tested. The detected temperature contours are in good agreement with the shapes and magnitudes of different heat sources.

15 November 2010 in Sensors
Verified
Journal Article
Open access
PDF file
MCMing-Yuan CHENG
Ming-Yuan CHENG
CLChun-Liang Lin
Chun-Liang Lin
YLYu-Tse Lai
Yu-Tse Lai
YYYao-Joe Yang
Yao-Joe Yang
In this work, we present the development of a polymer-based capacitive sensing array. The proposed device is capable of measuring normal and shear forces, and can be easily realized by using micromachining techniques and flexible printed circuit board (FPCB) technologies. The sensing array consists of a polydimethlysiloxane (PDMS) structure and a FPCB. Each shear sensing element comprises four capacitive sensing cells arranged in a 2 × 2 array, and each capacitive sensing cell has two sensing electrodes and a common floating electrode. The sensing electrodes as well as the metal interconnect for signal scanning are implemented on the FPCB, while the floating electrodes are patterned on the PDMS structure. This design can effectively reduce the complexity of the capacitive structures, and thus makes the device highly manufacturable. The characteristics of the devices with different dimensions were measured and discussed. A scanning circuit was also designed and implemented. The measured maximum sensitivity is 1.67%/mN. The minimum resolvable force is 26 mN measured by the scanning circuit. The capacitance distributions induced by normal and shear forces were also successfully captured by the sensing array.

1 May 2008 in Sensors and Actuators A: Physical
Verified
Journal Article
Closed access
YYY.-J. Yang
Y.-J. Yang
MCMing-Yuan CHENG
Ming-Yuan CHENG
WCW.-Y. Chang
W.-Y. Chang
LTL.-C. Tsao
L.-C. Tsao
SYS.-A. Yang
S.-A. Yang
Kuang-Chao FanKuang-Chao Fan
Kuang-Chao Fan

29 September 2009 in Journal of Micromechanics and Microengineering
Verified
Journal Article
Closed access
MCMing-Yuan CHENG
Ming-Yuan CHENG
XHX-H Huang
X-H Huang
CMC-W Ma
C-W Ma
YYY-J Yang
Y-J Yang

13 March 2013 in IEEE Transactions on Circuits and Systems I: Regular Papers
Verified
Journal Article
Closed access
XZXiaodan Zou
Xiaodan Zou
LLLei Liu
Lei Liu
JCJia Hao Cheong
Jia Hao Cheong
LYLei Yao
Lei Yao
PLPeng Li
Peng Li
MJMinkyu Je
Minkyu Je
This paper presents a fully implantable 100-channel neural interface IC for neural activity monitoring. It contains 100-channel analog recording front-ends, 10 multiplexing successive approximation register ADCs, digital control modules and power management circuits. A dual sample-and-hold architecture is proposed, which extends the sampling time of the ADC and reduces the average power per channel by more than 50% compared to the conventional multiplexing neural recording system. A neural amplifier (NA) with current-reuse technique and weak inversion operation is demonstrated, consuming 800 nA under 1-V supply while achieving an input-referred noise of 4.0 μV rms in a 8-kHz bandwidth and a NEF of 1.9 for the whole analog recording chain. The measured frequency response of the analog front-end has a high-pass cutoff frequency from sub-1 Hz to 248 Hz and a low-pass cutoff frequency from 432 Hz to 5.1 kHz, which can be configured to record neural spikes and local field potentials simultaneously or separately. The whole system was fabricated in a 0.18-μm standard CMOS process and operates under 1 V for analog blocks and ADC, and 1.8 V for digital modules. The number of active recording channels is programmable and the digital output data rate changes accordingly, leading to high system power efficiency. The overall 100-channel interface IC consumes 1.16-mW total power, making it the optimum solution for multi-channel neural recording systems.

1 April 2011 in Sensors and Actuators A: Physical
Verified
Journal Article
Closed access
MCMing-Yuan CHENG
Ming-Yuan CHENG
CTC.-M. Tsao
C.-M. Tsao
YLY.-Z. Lai
Y.-Z. Lai
YYY.-J. Yang
Y.-J. Yang