Petri nets are a well-known formalism widely used in different application areas. Yet, the lack of adequate tools that can be integrated within engineering development frameworks are one major drawback. This paper identifies and justifies the characteristics of one class of Petri nets targeted for the modelling of automation systems and (networked) embedded systems, named as input-output Petri net (IOPT), and its representation using the Petri net markup language (PNML). The paper also presents a set of associated tools under development. This Petri net class, defined on top of the well-known place-transition Petri nets, is the common link across a set of tools under development, including a graphical editor, a state-space analyser for the verification of properties, conflict resolution through automatic arbiter generation, automatic code generators, simulator, among others. In this sense, the main goal of the proposed Petri net class and associated tools is to support the entire system development flow, from specification to implementation.

This paper shows a novel prototyping technique for concurrent control systems described by interpreted Petri nets. The technique is based on the decomposition of an interpreted Petri net into concurrent sequential automata. In general, minimum decomposition requires runtime that is exponential in the number of Petri net places. We show that in many cases, including the real-life ones, the minimum decomposition problem can be solved in polynomial time. The proposed method allows implementing a concurrent control system using minimal number of sequential components, which requires polynomial time and can be applied to most of the considered cases. The presented concept is illustrated by a real-life industrial example of a beverage production and distribution machine implemented in a field programmable gate array.

Modeling of discrete-event systems using Petri net models is well-studied. Also, their usage for specification of digital controllers is widely used. Yet, it is recognized that we have a lack of tools when facing support for the implementation of these models, namely for automatic code generation. The paper briefly presents the FORDESIGN project that aims to develop a set of tools to contribute for filling this gap within automation systems and (networked) embedded systems development. The set of tools is based on a Petri net class, named as Input-Output Petri Net (IOPT), and its representation using the Petri Net Markup Language (PNML). The paper presents some rules used by an automatic code generator able to produce VHDL code starting with the PNML representation of the Petri net model.

The goal of the work presented in this paper is to contribute for the usage of Petri nets as the system-level specification language within the framework of hardware-software co-design of embedded systems, supporting system model partitioning into components. The paper presents the set of rules of the Petri net splitting operation based on the definition of a valid cutting set and able to divide a Petri net model into several sub-models which communicate through synchronous channels. The generated sub-models are associated with components to be executed concurrently and mapped into hardware or software components at the implementation level. The decomposition of the model is achieved using a set of three rules. Usage of this operation is presented using an automation system example, allowing splitting of the system model in order to obtain specifications for a set of distributed controllers.

A novel prototyping technique for concurrent control systems implemented in FPGA devices is proposed in the paper. The method allows for dynamic modification of the implemented system. It means that the functionality of a part of the controller can be changed, while the rest of the system is still running. The approach applies to UML state machine diagrams as a specification of the system. Contrary to other methods, the presented concept requires neither major changes to the design, nor the application of external, specialized tools. The proposed idea has been experimentally verified with the use of Xilinx FPGAs

Petri nets have been widely used in the design of embedded controllers, namely in electronic hardware and computing platforms design, as well as within automation application areas. This paper presents updated characteristics of one class of Petri nets, named Input-Output Place-Transition Petri nets (IOPT nets), extended to support networked embedded controllers design and globally-asynchronous locally-synchronous (GALS) systems modeling, together with its associated metamodel and execution semantics. The proposed meta-model is compliant with the Petri Net Markup Language (PNML) metamodel, augmented with the descriptions for inputs and outputs, as well as for time domains and communication channels. The meta-model is described using UML class diagrams and has an equivalent Ecore meta-model that positioning IOPT nets within the Eclipse Modeling Framework (EMF).