Attacks on Internet of Things (IoT) devices are on the rise. Physical Unclonable Functions (PUFs) are proposed as a robust and lightweight solution to secure IoT devices. The main advantage of a PUF compared to the current classical cryptographic solutions is its compatibility with IoT devices with limited computational resources. In this paper, we investigate the maturity of this technology and the challenges toward PUF utilization in IoT that still need to be addressed.

Network function virtualization (NFV) has the potential to fundamentally transform conventional network architecture through the decoupling of software from dedicated hardware. The convergence of virtualization and cloud computing technologies has revolutionized the networking landscape, offering a wide range of advantages, including improved flexibility, manageability, and scalability. The importance of network capability in enabling ultra-low latency applications has been greatly amplified in the current era due to the increased demand for emerging services such as autonomous driving, teleoperated driving, virtual reality, and remote surgery. This paper presents a novel and efficient methodology for service function chaining (SFC) in an NFV-enabled network that aims to minimize latency and optimize the utilization of physical network resources, with a specific focus on ultra-low latency applications. In our proposed methodology, we offer flow prioritization and an adjustable priority coefficient factor (µ) to reserve a portion of physical network resources exclusively for ultra-low latency applications in order to optimize the deployment paths of these applications further. We formulate the SFC deployment problem as an integer linear programming (ILP) optimization model. Furthermore, we propose a set of heuristic algorithms that yield near-optimal solutions with minimal optimality gaps and execution times, making them practical for large-scale network topologies. Performance evaluations demonstrate the effectiveness of our proposed methodology in enabling ultra-low latency applications in an NFV-enabled network. Compared to existing algorithms, our proposed methodology achieves notable enhancements in terms of the end-to-end delay (up to 22 percent), bandwidth utilization (up to 28 percent), and SFC acceptance rate (up to 13 percent).

Modern brain-computer interfaces and neural implants allow interaction between the tissue, the user and the environment, where people suffer from neurodegenerative diseases or injuries.This interaction can be achieved by using penetrating/invasive microelectrodes for extracellular recordings and stimulation, such as Utah or Michigan arrays. The application-specific signal processing of the extracellular recording enables the detection of interactions and enables user interaction. For example, it allows to read out movement intentions from recordings of brain signals for controlling a prosthesis or an exoskeleton. To enable this, computationally complex algorithms are used in research that cannot be executed on-chip or on embedded systems. Therefore, an optimization of the end-to-end processing pipeline, from the signal condition on the electrode array over the analog pre-processing to spike-sorting and finally the neural decoding process, is necessary for hardware inference in order to enable a local signal processing in real-time and to enable a compact system for achieving a high comfort level. This paper presents a survey of system architectures and algorithms for end-to-end signal processing pipelines of neural activity on the hardware of such neural devices, including (i) on-chip signal pre-processing, (ii) spike-sorting on-chip or on embedded hardware and (iii) neural decoding on workstations. A particular focus for the hardware implementation is on low-power electronic design and artifact-robust algorithms with low computational effort and very short latency. For this, current challenges and possible solutions with support of novel machine learning techniques are presented in brief. In addition, we describe our future vision for next-generation BCIs.