With the development of system-on-chip (SoC) and chiplet technology in the post-Moore era, an increasing number of chiplets are being integrated into a single chip. Consequently, the functions and complexity that can be realized are growing daily. Simultaneously, the volume of test data required for ultra-large-scale integrated circuits (ULSIs) has risen significantly. However, traditional automatic test equipment (ATE) is constrained by its data storage and bandwidth limitations, and its long technology iteration cycle. These cannot keep pace with the rapid development of design technology. This discrepancy leads to challenges in ULSI testing, such as excessively long test time and difficulties in completing the tests. Test compression technology can effectively address these issues by reducing the performance requirements of the test equipment, which in turn can lower test costs. This paper summarizes the classifications of chip test compression technology and, based on their current development, provides a detailed analysis of key technologies. It includes test compression-oriented coding methods, optimization of scan chain structures, and enhancements in coding for compression efficiency. Finally, a forward-looking perspective on the development of chip test compression technology is presented. The aim is to offer a reference for subsequent research in this field and related areas, as well as to provide technical support for the advancement of ULSI testing in the post-Moore era.

The offshore outsourcing introduces serious threats to semiconductor suppliers and integrated circuit(IC) users for the possibility of hardware trojans (HTs). To alleviate this threat, IC designers use the active defenses against HTs which are implanted by the malicious manufacturer. In this paper, a game-theoretic framework based on fuzzy theory is proposed to obtain the optimal strategy. It analyzes the interactions between the active defense designer and the malicious manufacturer. The attack and defense on IC is formulated as a noncooperative dynamic game. The active defense strategy is decided in IC design. And the overall payoff including design costs and losses avoided is optimized. Subsequently, the HT is implanted considering the implantation cost as well as the damage caused by it. To solve the problem of uncertain payoff caused by insufficient information, fuzzy variable is used to represent the influence of the defense coverage rate on the payoff. In order to verify the applicability of fuzzy variable in dynamic game framework, the existence of pure strategy Nash equilibrium in the game is proved. A solution algorithm for pure strategy Nash Equilibrium is proposed to obtain the optimal strategy of attacker and defender. Thanks to the case study of Field Programmable Gate Array (FPGA), the proposed framework is feasible for HT attack and defense game.

The globalization of integrated circuit (IC) design and fabrication has given rise to severe concerns with respect to modeling strategic interaction between malicious attackers and Hardware Trojan (HT) defenders using game theory. The quantitative assessment of attacker actions has made the game very challenging. In this paper, a novel rough set theory framework is proposed to analyze HT threat. The problem is formulated as an attribute weight calculation and element assessment in an information system without decision attributes. The proposed method introduces information content in the rough set that allows calculation of the weight of both core attributes and non-core attributes. For quantitative assessment, the HT threat is characterized by the closeness coefficient. In order to allow HT defenders to use fast and effective countermeasures, a threat classification method based on the k-means algorithm is proposed, and the Best Workspace Prediction (BWP) index is used to determine the number of clusters. Statistical tests were performed on the benchmark circuits in Trust-hub in order to demonstrate the effectiveness of the proposed technique for assessing HT threat. Compared with k-means, equidistant division-based k-means, and k-means++, our method shows a significant improvement in both cluster accuracy and running time.

New hardware security threats are emerging, meanwhile detection and recognition technologies are immature for unknown types. This paper introduces a relation matrix to analysis perniciousness of IC hardware Trojan. The relation matrix is based on characteristic deployment includes concealment of trigger and harmfulness of payload. Results of this paper can be used to measure the perniciousness of different types of hardware Trojan, also provide a way to predict new hardware threats, in this way help to defend unknown hardware attacks and improve detection efficiency.