wei xiaoli

Dr. wei xiaoli


Research Focus & Metrics

Academic Career Length

8Years (2019-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 June 2019 in Micromachines
Verified
Journal Article
Open access
PDF file
KRkang rao
kang rao
WXwei xiaoli
wei xiaoli
SZShaolin Zhang
Shaolin Zhang
MZMengqi Zhang
Mengqi Zhang
CHChenyuan Hu
Chenyuan Hu
LTLiangcheng Tu
Liangcheng Tu
This paper presents a micromachined micro-g capacitive accelerometer with a silicon-based spring-mass sensing element. The displacement changes of the proof mass are sensed by an area-variation-based capacitive displacement transducer that is formed by the matching electrodes on both the movable proof mass die and the glass cover plate through the flip-chip packaging. In order to implement a high-performance accelerometer, several technologies are applied: the through-silicon-wafer-etching process is used to increase the weight of proof mass for lower thermal noise, connection beams are used to reduce the cross-sensitivity, and the periodic array area-variation capacitive displacement transducer is applied to increase the displacement-to-capacitance gain. The accelerometer prototype is fabricated and characterized, demonstrating a scale factor of 510 mV/g, a noise floor of 2 µg/Hz1/2 at 100 Hz, and a bias instability of 4 µg at an averaging time of 1 s. Experimental results suggest that the proposed MEMS capacitive accelerometer is promising to be used for inertial navigation, structural health monitoring, and tilt measurement applications.

8 September 2022 in IEEE Transactions on Components, Packaging and Manufacturing Technology
Verified
Journal Article
Closed access
WXwei xiaoli
wei xiaoli
TCTianyou Chen
Tianyou Chen
JFJi Fan
Ji Fan
A sandwich structure, which is stacked by a wafer-level copper–copper (Cu–Cu) thermocompression bonding and a silicon–silicon (Si–Si) direct bonding, has been investigated for potential application as a hermetic seal in 3-D microsystem packaging. First, the bottom and middle layers are prebonded by hydrophilic Si direct bonding. Oxygen plasma is employed for surface activation. Then, the prebonded wafers and the top wafer are bonded via Cu thermocompression bonding at a bonding temperature of 300 °C and a bonding force of 8000 mbar for a duration of 1 h. The entire bonding process of the three layers has borne only one heating procedure, which could effectively reduce the residual stress after bonding. Cavities are etched to a volume of $21.4\times 10^{-3}$ cm3 following the MIL-STD-883E standard prescribed for microelectronics packaging. The helium leak test demonstrates that 96.8% of the samples present a superior leak rate smaller than $1.7\times 10^{-8}$ atm $\cdot $ cm3/s. Moreover, the interfacial adhesion energy between the Cu–Cu bonding interface and the Si–Si bonding interface was projected at 16.4 ± 4.6 J/ $\text{m}^{2}$ and Si breakage energy. The results hold great promise for 3-D microsystem wafer-level packaging.