This paper proposed a novel image segmentation method based on simplified pulse coupled neural network (SPCNN), which was optimized by gbest led gravitational search algorithm (GLGSA) that combined gravitational search algorithm (GSA) with gbest agent memory ability. To evaluate the performance of GLGSA, we applied it to 23 standard benchmark functions and compared with GSA and GGSA. The results showed that the GLGSA had better performance in term of convergence and avoidance of local minima. Besides, in order to improve the accuracy of segmentation, the fitness function consisted of cross entropy parameter (CEP), edge matching (EM) and noise control (NC). To verify the efficiency of our method, we compared it with the state-of-the-art algorithms, such as Otsu, GA Renyi and PSO-PCNN, using the gray nature images from the Berkeley Segmentation Dataset. Finally, the subjective visual analysis and quantitative analysis that included the uniformity measure (UM), region contrast measure (CM), structural similarity (SSIM) and comprehensive evaluation (CE) were used to evaluate the segmented images. The comparison results demonstrated that our proposed method could get better segmentation results.

This paper proposes an effective hardware accelerator for 2D $8\times 8$ discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) using an improved Loeffler architecture. The accelerator optimizes the data stream of the Loeffler 8-point 1D DCT/IDCT according to the characteristics of image and video processing. An 8-stage pipeline structure greatly improves the processing speed by reasonably dividing the number of clock cycles and simplifying the arithmetic operations in each cycle. The multiplication-free approximation of the DCT coefficients is implemented through adders and shifters, combined with both fixed-point and canonic signed digit (CSD) coding. In particular, the proposed fast parallel transposed matrix architecture achieves the function of row-column coefficient conversion with lower circuit complexity. The FPGA implementation of the proposed architecture uses a Virtex-7 XC7VX330T device, running at 288 MHz with a throughput of 558 M Pixel/sec, and a Full HD real-time frame rate of up to 269 fps. Only 33 cycles are required to complete the $8\times 8$ blocks of 2D DCT/IDCT, which can be used as a high-performance hardware accelerator for image and video compression encoding.

In order to efficiently solve the problem of optimization of the micro-channel heat sink, an optimization strategy combining intelligent algorithms and CFD was proposed. The micro-channel heat sink with the trapezoidal cavity and solid/slotted oval pins was proposed to enhance heat transfer. The aspect ratio, distance from the center of the oval pin to the center of the cavity, and slot thickness were design variables. The thermal resistance and pumping power of the micro-channel heat sink were objective functions. Within the selected range of design variables, thirty groups of uniformly sampled sample points were obtained by the Latin hypercube experiment. The 3-D model was established by SOLIDWORKS software, and the numerical simulation was carried out by using FLUENT soft-ware. The genetic algorithm optimized back propagation neural network to construct the prediction model, and the simulated data of Latin hypercube sampling were trained to obtain the non-linear mapping relationship between design variables and objective functions. The optimal combination of structural parameters of the micro-channel heat sink was obtained by optimization of the genetic algorithm, which was verified by numerical simulation. The results show that the optimization scheme was suitable for getting the optimal value of the structural parameters of the micro-channel heat sink, which provided a reference for the optimal design of the micro-channel heat sink.