Automatic ship detection in optical remote-sensing (ORS) images has wide applications in civil and military fields. Research on ship detection in ORS images started late compared to synthetic aperture radar (SAR) images, and it is difficult for traditional image-processing algorithms to achieve high accuracy. Therefore, we propose a ship-detection method based on a deep convolutional neural network that is modified from YOLOv3. We call it fused features and rebuilt (FFR) YOLOv3. We tried some improvements to enhance its performance in ship-detection regions. We added a squeeze-and-excitation (SE) structure to the backbone network to strengthen the ability to extract features. Through a large number of experiments, we optimized the backbone network to improve the speed. We improved the multi-scale detection of YOLOv3 by fusing multi-scale feature maps and regenerating them with a high-resolution network, which can improve the accuracy of detection and location. We used the public HRSC2016 ship-detection dataset and remote-sensing images collected from Google Earth to train, test, and verify our network, which reached a detection speed of about 27 frames per second (fps) on an NVIDIA RTX2080ti, with recall (R) = 95.32% and precision (P) = 95.62%. Experiments show that our network has better accuracy and speed than other methods. In addition, it has strong robustness and can adapt to complex environments like inshore ship detection.

Aiming at reducing the complexity of minimum mean square error (MMSE) detection in massive multiple-input multiple-output (MIMO) systems, this paper proposes a detection algorithm with high convergence rate and an efficient hardware architecture based on second-order Richardson iteration (SORI). In the proposed algorithm, a pre-iteration-based initialization method is presented to accelerate the convergence without extra complexity. In addition, the approximation of relaxation factor and the log-likelihood ratio (LLR) is introduced to further reduce computing load. Theoretical analysis demonstrates the advantages of the proposed algorithm in fast convergence and low complexity, and simulation results show that the proposed algorithm can efficiently approach MMSE performance. Based on this algorithm, a flexible hardware architecture is designed, which is deeply pipelined to support 128x U (8≤ U≤ 32) massive MIMO detection with the configurable number of iterations, and a folded dual-mode systolic array (DMSA) is fully utilized to achieve the flexibility with low hardware consumption. Implemented on Xilinx Virtex-7 FPGA and SMIC 40nm CMOS technology, the proposed detector is competitive in terms of energy and area efficiency compared to state-of-the-art iterative detectors, and it can adapt to the varied channel condition and the number of users in massive MIMO systems.

Convolutional neural networks (CNNs) have had great success when applied to computer vision technology, and many application-specific integrated circuit (ASIC) and field-programmable gate array (FPGA) CNN accelerators have been proposed. These accelerators primarily focus on the acceleration of a single input, and they are not particularly optimized for video applications. In this article, we focus on the similarities between continuous inputs in video, and we propose a YOLOv3-tiny CNN FPGA accelerator using incremental operation. The accelerator can skip the convolution operation of similar data between continuous inputs. We also use the Winograd algorithm to optimize the conv $3\times 3$ operator in the YOLOv3-tiny network to further improve the accelerator’s efficiency. Experimental results show that our accelerator achieved 74.2 frames/s on ImageNet ILSVRC2015. Compared to the original network without Winograd algorithm and incremental operation, our design provides a $4.10\times $ speedup. When compared with other YOLO network FPGA accelerators applied to video applications, our design provided a $3.13\times $ – $18.34\times $ normalized digital signal processor (DSP) efficiency and $1.10\times $ – $14.2\times $ energy efficiency.

Due to the winding level of the thinned wafers and the surface roughness of silicon dies, the quality of through-silicon vias (TSVs) varies during the fabrication and bonding process, which greatly reduces the yield of 3-D-ICs. The basic method to repair faulty TSVs (FTSVs) is to transfer the signals on FTSVs through regular TSVs. Many redundant TSV (RTSV) structures have been proposed to repair uniformly distributed FTSVs. For clustering FTSVs, a router-based RTSV structure appears to be a good scheme. But it is not an economical method, since the structure consumes many more hardware resources than normal structures. In this paper, we propose a cellular-based RTSV structure to utilize hardware resources more efficiently for a higher yield. We propose a corresponding algorithm for recovery-route searching. Simulation results show that for 1E6 TSVs and a TSV failure rate of 0.01%, our design consumes only 4.5% more area of all STSVs to achieve a yield above 99.9%. We compare our structure with several other designs and demonstrate the cost-effectiveness of the proposed technique.

Much attention is being paid to using high-performance convolutional neural networks (CNNs) in the area of ship detection in optical remoting sensing (ORS) images. However, the problem of false negatives (FNs) caused by side-by-side ships cannot be solved, and the number of false positives (FPs) remains high. This paper uses a DLA-34 network with deformable convolution layers as the backbone. The network has two priority branches: a recall-priority branch for reducing the number of FNs, and a precision-priority branch for reducing the number of FPs. In our single-shot detection method, the recall-priority branch is based on an anchor-free module without non-maximum suppression (NMS), while the precision-priority branch utilizes an anchor-based module with NMS. We perform recall-priority branch functions based on the output part of the CenterNet object detector to precisely predict center points of bounding boxes. The Bidirectional Feature Pyramid Network (BiFPN), combined with the inference part of YOLOv3, is used to improve the precision of precision-priority branch. Finally, the boxes from two branches merge, and we propose priority-based selection (PBS) for choosing the accurate ones. Results show that our proposed method sharply improves the recall rate of side-by-side ships and significantly reduces the number of false alarms. Our method also achieves the best trade-off on our improved version of HRSC2016 dataset, with 95.57% AP at 56 frames per second on an Nvidia RTX-2080 Ti GPU. Compared with the HRSC2016 dataset, not only are our annotations more accurate, but our dataset also contains more images and samples. Our evaluation metrics also included tests on small ships and incomplete forms of ships.

Scene text detection network, such as Connectionist Text Proposal Network (CTPN), takes CNN-RNN hybrid neural network as the main body, which can effectively recognize the text arranged horizontally in the image. However, complex structures and intensive calculations lead to longer network inference time. FPGAs have been widely used in data centers to accelerate neural network inference due to their flexibility and low power consumption. In this paper, a CPU-FPGA based heterogeneous acceleration system and a subgraph segmentation scheme for CNN-RNN hybrid neural networks are proposed. Winograd algorithm is applied to accelerate CNN. In RNN accelerating, fixed-point quantization, loop tiling, and piecewise linear approximation of activation function are used to reduce hardware resource usage and achieve a high degree of parallelization. CTPN is tested in our system with Intel Xeon 4116 CPU and Arria10 GX1150 FPGA, and the throughput reaches 1223.53GOP/s.