A fully differential multipath current-feedback instrumentation amplifier (CFIA) for a resistive bridge sensor readout integrated circuit (IC) is proposed. To reduce the CFIA’s own offset and 1/f noise, a chopper stabilization technique is implemented. To attenuate the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. A multipath architecture is implemented to compensate for the notch in the chopping frequency band of the transfer function. To prevent performance degradation resulting from external offset, a 12-bit R-2R digital-to-analog converter (DAC) is employed. The proposed CFIA has an adjustable gain of 16–44 dB with 5-bit programmable resistors. The proposed resistive sensor readout IC is implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. The CFIA draws 169 μA currents from a 3.3 V supply. The simulated input-referred noise and noise efficiency factor (NEF) are 28.3 nV/√Hz and 14.2, respectively. The simulated common-mode rejection ratio (CMRR) is 162 dB, and the power supply rejection ratio (PSRR) is 112 dB.

This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 µA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/√Hz, respectively.

In this paper, a low-power and low-noise readout circuit for resistive-bridge microsensors is presented. The chopper-stabilized, recycling folded cascode current-feedback instrumentation amplifier (IA) is proposed to achieve the low-power, low-noise, and high-input impedance. The chopper-stabilized, recycling folded cascode topology (with a Monticelli-style, class-AB output stage) can enhance the overall noise characteristic, gain, and slew rate. The readout circuit consists of a chopper-stabilized, recycling folded cascode IA, low-pass filter (LPF), ADC driving buffer, and 12-bit successive-approximation-register (SAR) analog-to-digital converter (ADC). The prototype readout circuit is implemented in a standard 0.18 µm CMOS process, with an active area of 12.5 mm². The measured input-referred noise at 1 Hz is 86.6 nV/√Hz and the noise efficiency factor (NEF) is 4.94, respectively. The total current consumption is 2.23 μA, with a 1.8 V power supply.

This paper presents a low-noise multi-path operational amplifier for high-precision sensors. A chopper stabilization technique is applied to the amplifier to remove offset and flicker noise. A ripple reduction loop (RRL) is designed to remove the ripple generated in the process of up-modulating the flicker noise and offset. To cancel the notch in the overall transfer function due to the RRL operation, a multi-path architecture using both a low-frequency path (LFP) and high-frequency path (HFP) is implemented. The low frequency path amplifier is implemented using the chopper technique and the RRL. In the high-frequency path amplifier, a class-AB output stage is implemented to improve the power efficiency. The transfer functions of the LFP and HFP induce a first-order frequency response in the system through nested Miller compensation. The low-noise multi-path amplifier was fabricated using a 0.18 µm 1P6M complementary metal-oxide-semiconductor (CMOS) process. The power consumption of the proposed low-noise operational amplifier is 0.174 mW with a 1.8 V supply and an active area of 1.18 mm². The proposed low-noise amplifier has a unit gain bandwidth (UGBW) of 3.16 MHz, an input referred noise of 11.8 nV/√Hz, and a noise efficiency factor (NEF) of 4.46.

This paper presents a low-noise reconfigurable sensor readout circuit with a multimodal sensing chain for voltage/current/resistive/capacitive microsensors such that it can interface with a voltage, current, resistive, or capacitive microsensor, and can be reconfigured for a specific sensor application. The multimodal sensor readout circuit consists of a reconfigurable amplifier, programmable gain amplifier (PGA), low-pass filter (LPF), and analog-to-digital converter (ADC). A chopper stabilization technique was implemented in a multi-path operational amplifier to mitigate 1/f noise and offsets. The 1/f noise and offsets were up-converted by a chopper circuit and caused an output ripple. An AC-coupled ripple rejection loop (RRL) was implemented to reduce the output ripple caused by the chopper. When the amplifier was operated in the discrete-time mode, for example, the capacitive-sensing mode, a correlated double sampling (CDS) scheme reduced the low-frequency noise. The readout circuit was designed to use the 0.18-µm complementary metal-oxide-semiconductor (CMOS) process with an active area of 9.61 mm². The total power consumption was 2.552 mW with a 1.8-V supply voltage. The measured input referred noise in the voltage-sensing mode was 5.25 µV_rms from 1 Hz to 200 Hz.

This paper presents a power line interference (PLI) reduction technique with a current-reused current-feedback instrumentation amplifier (CFIA) for electrocardiogram (ECG) recording. In a portable two-electrode ECG monitoring application, the presence of undesired PLI may severely corrupt the quality of ECG recording. Since PLI can be over a few volts, the input signal including the ECG signal can exceed the supply or ground level by an electrostatic discharge (ESD) diode in input/output (I/O) pad. To prevent this problem, this paper presents a continuous-time input common-mode current feedback loop that can limit displacement current from a capacitive coupling between the human body and a power line. The continuous-time input common-mode current feedback loop can clamp an input common-mode voltage to the saturation region of the input transistor of the current-reused CFIA. After the clamping procedure, the clamped input signal is amplified by the current-reused CFIA. The proposed circuit was designed using a 0.18-μm bipolar-complementary metal semiconductor–double-diffused metal oxide semiconductor (BCDMOS) process with an active area of 1.8 mm². The total power consumption is 18 μW with 1.8 V. The input-referred noise and noise efficiency factor (NEF) of the current-reused CFIA is 2.68 μV_RMS and 4.28 with 107 Hz, respectively.