A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal–semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.
In this work, three layers of transparent conductive films of WO3/Ag/WO3 (WAW) were deposited on a glass substrate by radio frequency (RF) magnetron sputtering. The thicknesses of WO3 (around 50~60 nm) and Ag (10~20 nm) films were mainly the changeable factors to achieve the optimal transparent conductivity attempting to replace the indium tin oxide (ITO) in cost consideration. The prepared films were cardinally subjected to physical and electrical characteristic analyses by means of X-ray diffraction analysis (XRD), field-emission scanning electron microscope (FE-SEM), and Keithley 4200 semiconductor parameter analyzer. The experimental results show as the thickness of the Ag layer increases from 10 nm to 20 nm, the resistance becomes smaller. While the thickness of the WO3 layer increases from 50 nm to 60 nm, its electrical resistance becomes larger.
This study proposes a two-photomask process for fabricating amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) that exhibit a self-aligned structure. The fabricated TFTs, which lack etching-stop (ES) layers, have undamaged a-IGZO active layers that facilitate superior performance. In addition, we demonstrate a bilayer passivation method that uses a polytetrafluoroethylene (Teflon) and SiO2 combination layer for improving the electrical reliability of the fabricated TFTs. Teflon was deposited as a buffer layer through thermal evaporation. The Teflon layer exhibited favorable compatibility with the underlying IGZO channel layer and effectively protected the a-IGZO TFTs from plasma damage during SiO2 deposition, resulting in a negligible initial performance drop in the a-IGZO TFTs. Compared with passivation-free a-IGZO TFTs, passivated TFTs exhibited superior stability even after 168 h of aging under ambient air at 95% relative humidity.
Q-factor is a reasonable index to investigate the integrity of circuits or devices in terms of their energy or charge storage capabilities. We use this figure of merit to explore the deposition quality of nano-node high-k gate dielectrics by decoupled-plasma nitridation at different temperatures with a fixed nitrogen concentration. This is very important in radio-frequency applications. From the point of view of the Q-factor, the device treated at a higher annealing temperature clearly demonstrates a better Q-factor value. Another interesting observation is the appearance of two troughs in the Q-VGS characteristics, which are strongly related to either the series parasitic capacitance, the tunneling effect, or both.
Concrete is a brittle material due to its poor tensile strength; consequently, concrete tends to crack or peel under an applied external load. Previous studies have investigated the effect of incorporating fiber into concrete, which can improve its tensile strength. In this study, the static and dynamic mechanical characteristics of three types of fiber-reinforced concrete (FRC) were examined: carbon-fiber-reinforced concrete (CFRC); Kevlar-fiber-reinforced concrete (KFRC); and a combination of both, known as carbon/Kevlar-hybrid-fiber-reinforced concrete (HFRC). This study created concrete specimens by pneumatically dispersing carbon and Kevlar fibers and mixing them with cement to comprise 1% of the weight. The mixture was then combined with aggregates and water to form the concrete specimens. When compared with the benchmark concrete specimens, it was found that the compressive strength of the CFRC, KFRC, and HFRC specimens increased by about 19% to 50%, the bending strength increase by about 8% to 32%, and the splitting strength increased by about 4% to 36%. Specifically, the HFRC made with the 24 mm carbon and Kevlar fibers displayed the most significant mechanical strength in a static state. Furthermore, the HFRC showed superior resistance to impact compared to the benchmark concrete specimens across various impact energies, with the 24 mm carbon and Kevlar fiber HFRC showing the highest resistance. The inclusion of fibers in the split Hopkinson pressure bar (SHPB) test demonstrated a notable increase in the maximum strength, particularly in the case of the 12 mm carbon fiber combined with the 24 mm Kevlar fiber in the HFRC specimen.
Minimizing the parasitic capacitance and the number of photo-masks can improve operational speed and reduce fabrication costs. Therefore, in this study, a new two-photo-mask process is proposed that exhibits a self-aligned structure without an etching-stop layer. Combining the backside-ultraviolet (BUV) exposure and backside-lift-off (BLO) schemes can not only prevent the damage when etching the source/drain (S/D) electrodes but also reduce the number of photo-masks required during fabrication and minimize the parasitic capacitance with the decreasing of gate overlap length at same time. Compared with traditional fabrication processes, the proposed process yields that thin-film transistors (TFTs) exhibit comparable field-effect mobility (9.5 cm2/V·s), threshold voltage (3.39 V), and subthreshold swing (0.3 V/decade). The delay time of an inverter fabricated using the proposed process was considerably decreased.