Capacitors are widely used in dc links of power electronic converters to balance power, suppress voltage ripple, and store short-term energy. Condition monitoring (CM) of dc-link capacitors has great significance in enhancing the reliability of power converter systems. Over the past few years, many efforts have been made to realize CM of dc-link capacitors. This paper gives an overview and a comprehensive comparative evaluation of them with emphasis on the application objectives, implementation methods, and monitoring accuracy when being used. First, the design procedure for the condition monitoring of capacitors is introduced. Second, the main capacitor parameters estimation principles are summarized. According to these principles, various possible CM methods are derived in a step-by-step manner. On this basis, a comprehensive review and comparison of CM schemes for different types of dc-link applications are provided. Finally, application recommendations and future research trends are presented.

Aluminum Electrolytic Capacitor (AEC) is one of the weakest components in power electronic converters. As the degradation of AEC happens, its equivalent series resistance (ESR) increases and the capacitance (C) decreases. Therefore, online monitoring of ESR and C to predict AEC’s life has great significance for ensuring safe and reliable operation of converters. In this paper, an online monitoring scheme is proposed for buck converters, aiming to estimate the ESR and C of AEC at the output side. The proposed scheme utilizes large-signal load transient trajectories to estimate the AEC parameters and has a relatively low sampling frequency. By analyzing the relationship between the transient trajectory and capacitor parameters, the ESR is directly calculated using the voltage and current step values at the initial instant of the transient. Further, C is calculated utilizing a calculation model derived from the output-voltage load transient trajectory. Corresponding simulation analysis and an online monitoring system implementation are provided. Furthermore, a 48V-12V buck converter with a digital PI controller and an analog V2 controller is built to verify the proposed online estimation method. The experimental results of the estimated ESR and C are consistent with the results measured by an LCR meter, and the estimation error is less than 10%.

In AEC-used boost PFC converters, ESR of AEC causes a small jump in the switching ripple of output voltage at switching moments, especially at turn-off moments. This small jump is hardly observed at line-frequency scale, either using time-domain analysis or frequency-domain analysis. However using time-frequency analysis this jump is very prominent due to its singularity. In this, an online ESR estimation method of AEC is proposed by using the Wavelet Transform (WT) based time-frequency analysis. The relationship between ESR and the jump amount of output voltage at turn-off moments is analyzed first, and then the ESR calculation model is derived using WT with the wavelet basis of the first derivative of Gaussian function. An appropriate sampling interval for the output voltage and the inductor current is determined. Besides, the online ESR estimation scheme is implemented including the hardware and software designs. Furthermore, a prototype of boost PFC converter with ac 220V input and dc 360V output is built, where an average current mode (ACM) control chip UC3854 is used. Four factors are discussed for estimation accuracy in the experiment, and the estimated results are consistent with the results measured by LCR meter with a relative error less than 10%.

In the boost power factor correction (PFC) converters, a low-pass filter (LPF) is generally adopted to eliminate the influence of the double-line frequency output voltage ripple on the controlled input current, which therefore limits the outer-voltage loop bandwidth. Different from the existing alternative schemes to the LPF, which eliminate the influence of the output voltage ripple using output-feedback ways in the outer-voltage loop, this paper proposes a current feedforward scheme in the inner-current loop to remove the LPF. In this proposed scheme the harmonic distortion of the reference current is suppressed by using a current-harmonic feedforward compensation (CHFC) way in synchronous reference frame. Finally, a 225W experimental prototype is built with digital implementation, and the experimental results show a more than 68% improvement of the dynamic response for the case with the proposed scheme compared with the traditional LPF scheme, along with a high quality controlled current.

Stability studies of voltage-source converter HVDC (VSC-HVDC) systems are mainly based on small-signal linearization techniques. However, when VSC-HVDC systems become unstable due to large-signal disturbances, the small-signal analysis method would be no longer available. In this paper, the large signal stability of VSC-HVDC system is studied based on mixed potential theory. A simplified state-space averaging model of VSC-HVDC system is established under the synchronous rotating reference frame. Based on this model, the stability prediction criteria for VSC-HVDC system under large-signal disturbances is obtained through Brayton-Moser's nonlinear potential method. On this foundation, the influence of system parameters on the large-signal stability is studied and the boundaries of stability are located as well. Time-domain simulations conducted in Matlab/Simulink are used to test the stability of the working points next to the stable boundary, which aim to prove the correctness of the obtained stability criterion. Aiming at the unstable situation, the time-domain simulation results prove the feasibility of the method of adjusting the system parameters according to the stability criterion to make the system stable, which further verifies the correctness of the stability criterion.

Aluminum electrolytic capacitors (Al-Caps) are widely used in the dc link of ac/dc applications; however, they are one of the weakest components in power electronic converters. With the degradation of Al-Cap, its capacitance ( C ) decreases, and the equivalent series resistance increases. Based on this, many efforts have been made to realize condition monitoring (CM) of Al-Caps. Unfortunately, additional hardware (including current sensors and sampling circuits) and/or powerful data processing tools are usually required, which increases the cost and would bring new reliability risks. Considering this issue, this article presents a transient-based CM scheme for dc-link capacitors in digital-controlled boost power factor correction (PFC) converters, which does not need additional sampling devices. By analyzing the relationship between large-signal transient voltage profile and dc-link capacitance, a calculation model is established. Based on the sampled voltage and current signals used for digital control, the dc-link capacitance can be online estimated. Its feasibility is validated in simulation with a boost PFC operating in continuous conduction mode (CCM) and discontinuous conduction mode. Furthermore, taking a 1-kW boost PFC operating in CCM as a case study, experimental results illustrate that the estimation errors of the dc-link capacitance are less than 3.5% (error of a single test) and 1.5% (average error of multiple tests).