This paper reports on a complete end-to-end 5G mmWave testbed fully reconfigurable based on a FPGA architecture. The proposed system is composed of a baseband/low-IF processing unit, and a mmWave RF front-end at both TX/RX ends. In particular, the baseband unit design is based on a typical agile digital IF architecture, enabling on-the-fly modulations up to 256-QAM. The real-time 5G mmWave testbed, herein presented, adopts OFDM as the transmission scheme waveform, which was assessed OTA by considering the key performance indicators, namely EVM and BER. A detailed overview of system architecture is addressed together with the hardware considerations taken into account for the mmWave testbed development. Following this, it is demonstrated that the proposed testbed enables real-time multi-stream transmissions of UHD video content captured by nine individual cameras, which is in fact one of the killing applications for 5G.

This paper introduces a novel 5G Millimetre-wave (mmWave) real-time Multiple-Input Multiple-Output (MIMO) testbed architecture aimed to tackle the 5G communication requirements. In this context, a $2\times2$ Alamouti coder and decoder is implemented in the VC707 Field Programmable Gate Array (FPGA) development board and its logical resources usage compared to those in the literature. In order to reduce the Hardware (HW) footprint of the proposed MIMO - Orthogonal Frequency Division Multiplexing (OFDM) Alamouti system, a pipelined modular architecture is considered, in order to boost HW utilisation and performance of MIMO-OFDM systems. A single pair of Inverse Fast Fourier Transform (IFFT)/ Fast Fourier Transform (FFT) is enough to process data for each MIMO antenna path. The achieved results show the importance of FPGA resource optimisation, demonstrating how depend coding and modulation are to hardware resources. Moreover, a Radio Frequency (RF) architecture is proposed to address $2 \times2$ MIMO communications at 26 GHz.

This paper discusses the feasibility and implementation of a complete Optical Wireless Communications (OWC) system emulator. The emulating platform comprises the ability to model all the key aspects of an OWC system, such as the emitter, the channel and the receiver. In order to implement the proposed architecture, Field-Programmable Gate Arrays (FPGAs) were chosen due to their flexibility and processing power. The proposed architecture operates in real time with a sampling frequency of 250MHz. The achieved results demonstrate the channel effects on signal transmission, allowing designers to improve system design from the early stages of the project. For illustration purposes, the results demonstrate the transmission of a 4-Quadrature Amplitude Modulation (QAM) Orthogonal Frequency Division Multiplexing (OFDM) modulated signal through the channel. As it is demonstrated, several important metrics, such as channel frequency response, bit error rates or signal constellations, are readily available, through a dedicated interface with Matlab.

This paper presents the first results on the design and implementation of a real-time and high resolution monostatic radar at 24 GHz, based on the sliding correlation of pseudonoise (PN) sequences. The real-time radar, with a high time resolution better than 4ns, is used for moving target identification (MTI) in the presence of highly dense clutter, under harsh environments and severe weather conditions (fog, snow and fire smoke or plume). A radar signal processing based on alldigital PN sequences is proposed, which represents a quantum leap in radar future front-end architecture. Results obtained in a controlled environment, inside an anechoic chamber, are presented and a benchmark with a commercially-of-the-shelf solution is presented.